M16C/62 Group DATASHEET

S I/O3, 4Mitsubishi microcomputersM16C / 62 GroupSINGLE-CHIP 16-BIT CMOS MICROCOMPUTERTable 1.19.12. Specifications of S I/O3, 4ItemTransfer data formatTransfer clockConditions fortransmission/reception startInterrupt requestgeneration timingSelect functionPrecautionSpecifications• Transfer data length: 8 bits• With the internal clock selected (bit 6 of 036216, 036616 = “1”): f1/2(ni+1),f8/2(ni+1), f32/2(ni+1) (Note 1)• With the external clock selected (bit 6 of 036216, 036616 = 0):Input from the CLKi terminal (Note 2)• To start transmit/reception, the following requirements must be met:- Select the synchronous clock (use bit 6 of 036216, 036616).Select a frequency dividing ratio if the internal clock has been selected (use bits0 and 1 of 036216, 036616).- SOUTi initial value set bit (use bit 7 of 036216, 036616)= 1.- S I/Oi port select bit (bit 3 of 036216, 036616) = 1.- Select the transfer direction (use bit 5 of 036216, 036616)-Write transfer data to SI/Oi transmit/receive register (036016, 036416)• To use S I/Oi interrupts, the following requirements must be met:- Clear the SI/Oi interrupt request bit before writing transfer data to the SI/Oitransmit/receive register (bit 3 of 004916, 004816) = 0.• Rising edge of the last transfer clock. (Note 3)• LSB first or MSB first selectionWhether transmission/reception begins with bit 0 (LSB) or bit 7 (MSB) can beselected.• Function for setting an SOUTi initial value selectionWhen using an external clock for the transfer clock, the user can choose theSOUTi pin output level during a non-transfer time. For details on how to set, seeFigure 1.19.33.• Unlike UART0–2, SI/Oi (i = 3, 4) is not divided for transfer register and buffer.Therefore, do not write the next transfer data to the SI/Oi transmit/receive register(addresses 036016, 036416) during a transfer. When the internal clock is selectedfor the transfer clock, SOUTi holds the last data for a 1/2 transfer clock period afterit finished transferring and then goes to a high-impedance state. However, if thetransfer data is written to the SI/Oi transmit/receive register (addresses 036016,036416) during this time, SOUTi is placed in the high-impedance state immediatelyupon writing and the data hold time is thereby reduced.Note 1: n is a value from 0016 through FF16 set in the S I/Oi transfer rate register (i = 3, 4).Note 2: With the external clock selected:• Before data can be written to the SI/Oi transmit/receive register (addresses 036016, 036416), theCLKi pin input must be in the high state. Also, before rewriting the SI/Oi Control Register (addresses036216, 036616)’s bit 7 (SOUTi initial value set bit), make sure the CLKi pin input is held high.• The S I/Oi circuit keeps on with the shift operation as long as the synchronous clock is entered in it,so stop the synchronous clock at the instant when it counts to eight. The internal clock, if selected,automatically stops.Note 3: If the internal clock is used for the synchronous clock, the transfer clock signal stops at the “H” state.150