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M16C/62 Group DATASHEET

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Timing (Vcc = 3V)Mitsubishi microcomputers<strong>M16C</strong> / <strong>62</strong> <strong>Group</strong>SINGLE-CHIP 16-BIT CMOS MICROCOMPUTERVCC = 3VTiming requirements (referenced to VCC = 3V, VSS = 0V at Ta = 25 o C unless otherwise specified)Table 1.26.25. External clock inputtctw(H)tw(L)trtfSymbolExternal clock inputcycle timeExternal clock inputHIGH pulse widthExternal clock inputLOW pulse widthExternal clock rise timeExternal clock fall timeParameterEPROM, One-time PROMMask ROM, Flash memory (5V version)EPROM, One-time PROMMask ROM, Flash memory (5V version)EPROM, One-time PROMMask ROM, Flash memory (5V version)StandardMin. Max.143100604060401818UnitnsnsnsnsnsnsnsnsTable 1.26.26. Memory expansion and microprocessor modesSymboltac1(RD-DB)tac2(RD-DB)tac3(RD-DB)tsu(DB-RD)tsu(RDY-BCLK )tsu(HOLD-BCLK )th(RD-DB)th(BCLK -RDY)th(BCLK-HOLD )ParameterData input access time (no wait)Data input access time (with wait)Data input access time (when accessing multiplex bus area)Data input setup timeRDY input setup timeHOLD input setup timeData input hold timeRDY input hold timeHOLD input hold timetd(BCLK-HLDA)HLDA output delay timeNote: Calculated according to the BCLK frequency as follows:10 9tac1(RD – DB) = – 90f(BCLK) X 2 [ns]StandardMin. Max.806080000(Note)(Note)(Note)100Unitnsnsnsnsnsnsnsnsnsns3 X 10 9tac2(RD – DB) = – 90f(BCLK) X 2 [ns]3 X 10 9tac3(RD – DB) = – 90f(BCLK) X 2[ns]199

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