M16C/62 Group DATASHEET

S I/O3, 4Mitsubishi microcomputersM16C / 62 GroupSINGLE-CHIP 16-BIT CMOS MICROCOMPUTERFunctions for setting an SOUTi initial valueWhen using an external clock for the transfer clock, the SOUTi pin output level during a non-transfertime can be set to the high or the low state. Figure 1.19.33 shows the timing chart for setting an SOUTiinitial value and how to set it.(Example) With “H” selected for SOUTi:Signal written to the S I/Oitransmission/receptionregisterSOUTi's initial valueset bit (SMi7)S I/Oi port select bit SMi3 = 0SOUTi initial value select bitSMi7 = 1(SOUTi: Internal “H” level)S I/Oi port select bit(SMi3)S I/Oi port select bitSMi3 = 0 1(Port select: Normal portSOUTi)SOUTi (internal)D0SOUTi terminal = “H” outputSOUTi terminal output(i = 3, 4)Port outputSetting the SOUTiinitial value to HPort selection(normal portInitial value = “H” (Note)SOUTi)Note: The set value is output only when the external clock has been selected. Wheninitializing SOUTi, make sure the CLKi pin input is held “H” level.If the internal clock has been selected or if SOUT output disable has been set,this output goes to the high-impedance state.D0Signal written to the S I/Oi register=“L” “H” “L”(Falling edge)SOUTi terminal = Outputtingstored data in the S I/Oi transmission/reception registerFigure 1.19.33. Timing chart for setting SOUTi’s initial value and how to set itS I/Oi operation timingFigure 1.19.34 shows the S I/Oi operation timing1.5 cycle (max)SI/Oi internal clock"H""L"Transfer clock(Note 1)Signal written to theS I/Oi registerS I/Oi output SOUTi(i= 3, 4)"H""L""H""L""H""L"HizD0 D1 D2 D3 D4 D5 D6D7Note2HizS I/Oi input SINi(i= 3, 4)"H""L"SI/Oi interrupt requestbit(i= 3, 4)"1""0"Note 1: With the internal clock selected for the transfer clock, the frequency dividing ratio can be selected using bits 0 and 1 of the S I/Oi controlregister. (i=3,4) (No frequency division, 8-division frequency, 32-division frequency.)Note 2: With the internal clock selected for the transfer clock, the SOUTi (i = 3, 4) pin becomes to the high-impedance state after the transfer finishes.Note 3: Shown above is the case where the SOUTi (i = 3, 4) port select bit ="1".Figure 1.19.34. S I/Oi operation timing chart151