M16C/62 Group DATASHEET

CPU Rewrite Mode (Flash Memory Version)Mitsubishi microcomputersM16C / 62 GroupSINGLE-CHIP 16-BIT CMOS MICROCOMPUTERProgram status (SR4)The program status informs the operating status of auto write operation to the CPU. When a writeerror occurs, it is set to 1.The program status is reset to 0 when cleared.When an erase command is in error (which occurs if the command entered after the block erasecommand (2016) is not the confirmation command (D016), both the program status and erase status(SR5) are set to 1.When the program status or erase status = 1, the following commands entered by command write arenot accepted.Also, in one of the following cases, both SR4 and SR5 are set to 1 (command sequence error):(1) When the valid command is not entered correctly(2) When the data entered in the second bus cycle of lock bit program (7716/D016), block erase(2016/D016), or erase all unlock blocks (A716/D016) is not the D016 or FF16. However, if FF16 isentered, read array is assumed and the command that has been set up in the first bus cycle iscanceled.Block status after program (SR3)If excessive data is written (phenomenon whereby the memory cell becomes depressed which resultsin data not being read correctly), “1” is set for the program status after-program at the end of the pagewrite operation. In other words, when writing ends successfully, “8016” is output; when writing fails,“9016” is output; and when excessive data is written, “8816” is output.Table 1.29.2. Definition of each bit in status registerEach bit ofSRDSR7 (bit7)SR6 (bit6)SR5 (bit5)SR4 (bit4)SR3 (bit3)SR2 (bit2)SR1 (bit1)SR0 (bit0)Status nameWrite state machine (WSM) statusReservedErase statusProgram statusBlock status after programReservedReservedReservedDefinition"1" "0"ReadyBusy--Terminated in error Terminated normallyTerminated in error Terminated normallyTerminated in error Terminated normally------247