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M16C/62 Group DATASHEET

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Serial I/OMitsubishi microcomputers<strong>M16C</strong> / <strong>62</strong> <strong>Group</strong>SINGLE-CHIP 16-BIT CMOS MICROCOMPUTERUARTi transmit buffer register(b15)(b8)b7b0 b7b0Symbol Address When resetU0TB 03A316, 03A216 IndeterminateU1TB 03AB16, 03AA16 IndeterminateU2TB 037B16, 037A16 IndeterminateTransmit dataFunctionNothing is assigned.In an attempt to write to these bits, write “0”. The value, if read, turn out to be indeterminate.R WUARTi receive buffer register(b15) (b8)Symbol Address When resetb7b0 b7b0U0RB 03A716, 03A616 IndeterminateU1RB 03AF16, 03AE16 IndeterminateU2RB 037F16, 037E16 IndeterminateBitsymbolOERFERPERSUMBit nameOverrun error flag (Note 1)Framing error flag (Note 1)Parity error flag (Note 1)Error sum flag (Note 1)Function(During clock synchronousserial I/O mode)Receive data0 : No overrun error1 : Overrun error foundInvalidInvalidInvalidFunction(During UART mode)Receive data0 : No overrun error1 : Overrun error found0 : No framing error1 : Framing error found0 : No parity error1 : Parity error found0 : No error1 : Error foundR WNothing is assigned.In an attempt to write to these bits, write “0”. The value, if read, turns out to be “0”.ABT Arbitration lost detecting 0 : Not detectedInvalidflag (Note 2)1 : DetectedNote 1: Bits 15 through 12 are set to “0” when the serial I/O mode select bit (bits 2 to 0 at addresses 03A016,03A816 and 037816) are set to “0002” or the receive enable bit is set to “0”.(Bit 15 is set to “0” when bits 14 to 12 all are set to “0”.) Bits 14 and 13 are also set to “0” when thelower byte of the UARTi receive buffer register (addresses 03A616, 03AE16 and 037E16) is read out.Note 2: Arbitration lost detecting flag is allocated to U2RB and noting but “0” may be written. Nothing isassigned in bit 11 of U0RB and U1RB. These bits can neither be set or reset. When read, the valueof this bit is “0”.UARTi bit rate generatorb7b0 Symbol Address When resetU0BRG 03A116 IndeterminateU1BRG 03A916 IndeterminateU2BRG 037916 IndeterminateFunctionAssuming that set value = n, BRGi divides the count source byn + 1Values that can be set0016 to FF16R WFigure 1.19.4. Serial I/O-related registers (1)116

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