24-26 September 2008, Rome, Italy[6] N. Nenadović, V. d’Alessandro, L. K. Nanver, F. Tamigi, N. Rinaldi,and J. W. Slotboom, “A back-wafer contacted silicon-on-glassintegrated bipolar process – Part II: A novel analysis of thermalbreakdown,” IEEE Trans. on Electron Devices, vol. 51, no. 1, pp. 51-62, 2004.[12] S. P. Marsh, “Direct extraction technique to derive the junctiontemperature of HBT's under high self-heating bias conditions,” IEEETrans. on Electron Devices, vol. 47, no. 2, pp. 288-291, 2000.[13] R. Menozzi, J. Barrett, and P. Ersland, “A new method to extract HBTthermal resistance and its temperature and power dependence,” IEEE[7] N. Nenadović, V. d’Alessandro, L. La Spina, N. Rinaldi, andL. K. Nanver, “Restabilizing mechanisms after the onset of thermalinstability in bipolar transistors,” IEEE Trans. on Electron Devices,vol. 53, no. 4, pp. 643-653, 2006.Trans. on Device and Materials Reliability, vol. 5, no. 3, pp. 595-601,2005.[14] D. E. Dawson, A. K. Gupta, and M. L. Salib, “CW measurement ofHBT thermal resistance,” IEEE Trans. on Electron Devices, vol. 39,[8] L. La Spina, V. d’Alessandro, F. Santagata, N. Rinaldi, andL. K. Nanver, “Electrothermal effects in bipolar differential pairs,” inProc. IEEE BCTM, pp. 131-134, 2007.no. 10, pp. 2235-2239, 1992.[15] V. d’Alessandro, N. Nenadović, F. Tamigi, L. K. Nanver,H. Schellevis, and J. W. Slotboom, “Detection of thermal runaway and[9] Comsol Multiphysics 3.4. User’s Guide. Comsol AB, 2007.extraction of thermal resistance in silicon-on-glass NPN BJTs using[10] D. T. Zweidinger, R. M. Fox, J. S. Brodsky, T. Jung, and S.-G. Lee,“Thermal impedance extraction for bipolar transistors,” IEEE Trans.on Electron Devices, vol. 43, no. 2, pp. 342-346, 1996.[11] J. Zarębski and K. Górecki, “A method of the BJT transient thermalimpedance measurement with double junction calibration,” in Proc.IEEE Semiconductor Thermal Measurement and ManagementSymposium (SEMI-THERM), pp. 80-82, 1995.the V CB-V BE voltage plane,” in Proc. SAFE/STW, pp. 22-29, 2002.[16] L. La Spina, I. Marano, V. d’Alessandro, H. Schellevis, andL. K. Nanver, “Aluminum-nitride thin-film heatspreaders integrated inbipolar transistors,” in Proc. IEEE EuroSimE, pp. 99-103, 2008.[17] L. La Spina, E. Iborra, H. Schellevis, M. Clement, J. Olivares, andL. K. Nanver, “Aluminum nitride for heatspreading in RF IC’s,”Solid-State Electronics, vol. 52, no. 9, pp. 1359-1363, 2008.©<strong>EDA</strong> <strong>Publishing</strong>/THERMINIC 2008 105ISBN: 978-2-35500-008-9
24-26 September 2008, Rome, ItalyThermal Transient Characterisationof Complex CircuitsGergely Perlaky 1,2 , Gábor Farkas 1,2perlaky@eet.bme.hu, farkas@micred.com1 Budapest University of Technology and Economics (BUTE), Dept. of Electron Devices2 MicReD Ltd,Budapest, HungaryThermal measurement of simple components (transistors,diodes) is a well-defined task. However, power stepsapplied on complex structures such as smart-power devices,RAM modules or voltage regulators cause electrictransients in the millisecond order. As an interesting portionof thermal transients characterising the die attachquality of the chips lies in the μs range, proper measurementtechniques have to be elaborated. In this paper wediscuss measurement of monolithic integrated circuits,boards, subsystems and appliances with deep insight intostructural details.I. INTRODUCTIONThermal transient testing is a well-defined task and broadlyused in R&D laboratories and in component production.However, the testing is usually restricted on packaged componentsof relatively small size and simple electric structuressuch as diodes and transistors. In real life, the thermal measurementof complex systems realised in monolithic ICs andcharacterisation of boards, subsystems and appliances isequally needed.The measurement of simple monolithic components isproperly standardised in the JEDEC JESD51 documents.The standard offers a modular test approach, where ameasurement process can be built up on the following elements(actual examples of a realisation shown in italics):Temperature measurement technique: electricalBoundary: composed of-Test Environment: natural convection-Component Mounting:low conductivity test board for SMD package,Device Construction: wirebond thermal test chipThe standard assumes small packaged components, itgives guidelines for the measurement of package sizes below48 mm mounted on a board of maximum 101mm x 114mm.If we are going to measure complex structures and completeappliances; for repeatable results we have to define ourtest environment and measurement technique. Besides thefixtures representing the environment (still air chamber, coldplate, optical sphere etc.) sometimes even the tester equipmenthas to be redefined.II. CONSIDERATIONSSuppose we have a complex system, like a desktop computercomposed of a motherboard populated by a bunch of ICs,CPUs with rotating fans, memory modules etc.For a complete characterisation of the complete system,sub-systems or boards we have to define different factors aslisted below:The boundaryWe can use several measurement setups, such asA. In situ measurement, several modules are plugged into amotherboard. The motherboard is in a real system boxwith fan rotating.B. In situ measurement, worse case, with fan not rotating.Natural convection allowed through vents.C. Modelled environment, worst case, equipment is placedinto still air chamberD. Modelled environment, characteristics taken at differentwind tunnel speedThe device under testWe can use for measurement several real subsystems,modified boards or dummies. For example, the thermalproperties of a RAM module can be investigated on aa) Real module. GND and VDD lines can be used forpowering. The power step can be applied within the systemby a sudden clock frequency change, memory blockaddressed and written continuously etc.b) Modified real module. GND and VDD lines can be cutat the chips for allowing separate powering and sensing,enable or disable inputs can be biased for temperaturesensing.c) Modified real module. The I/O lines are slightly alteredfor easy powering and sensing of separate chips.d) Dummy module. All chips are real ones at their originalplace. The copper traces on the module are similar to thereal ones but VDD and GND lines of each chip are separatelysent to the edge connector for substrate diodestyle measurement.e) Dummy module. As d) but the protection diodes of anenable signal are used for sensing.©<strong>EDA</strong> <strong>Publishing</strong>/THERMINIC 2008 106ISBN: 978-2-35500-008-9
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