Online proceedings - EDA Publishing Association

24-26 September 2008, Rome, ItalyThe Semiconductor - Dielectric Interface from PNJunction Periphery and its Influence on Reliabilityof Power Devices at High TemperatureV.V.N. ObrejaNational R&D Institute for Microtechnology (IMT – Bucuresti)Str. Erou Iancu Nicolae 126A, 077190, Bucharest, RomaniaAbstract - Data sheets of commercial power semiconductor devicesand modules available at this time on the market indicate amaximum permissible junction temperature specified in a rangeof 125 -200 o C. Operation above the specified value is not possiblewithout risk of device failure, although this is desirable inemerging power electronics applications. Typical device blockingelectrical characteristics at high junction temperature arepresented and analyzed. A portion of blocking current-voltagecharacteristic given by a PN junction at reverse bias voltage canbe fitted to linear variation. At higher applied voltage towards thebreakdown region deviation from linear variation is exhibited. Byincreasing the junction temperature from 150 o C towards 200 o Cand above this value, the portion of the current-voltagecharacteristic exhibiting linear variation becomes more reduced.If the applied voltage reaches the portion of electricalcharacteristic with deviation from linear variation towards thebreakdown region, thermal instability of the characteristic isdeveloped in short time. Device failure is possible if the appliedvoltage is not suppressed. Analysis of failed devices operated insuch conditions indicates excessive high current or even electricalshort-circuit for PN junctions at reverse applied voltage. It isshown that such behavior is due to a spot of material degradationlocated at the junction periphery. Most of leakage current flow ina thin interfacial layer between the semiconductor material andthe passivating dielectric material from the junction edge accountsfor many device failures during operation at high temperature.I. INTRODUCTIONDiscrete power semiconductor devices like diodes,transistors, thyristors or integrated modules have PN junctionscoated at their periphery with a dielectric material layer, [1-3].The interface between the semiconductor and dielectricmaterial from the junction periphery can have significantinfluence on the device current blocking capability.Nonetheless, this influence is usually neglected in theory andpractice. A high level of the leakage reverse current (I R ) ofsilicon PN junctions at high temperature is attributed tophenomena in the junction bulk, [4 - 5] and not to thephenomena from the interface. Due to high level of I R , themaximum operation junction temperature (T jmax ) of silicondevices is limited to 150 – 200 o C. Reliable operation at highertemperature value is desirable in applications. Above thespecified value of T jmax in the device data sheet, operation is atfailure risk because of local overheating at the junctionperiphery and instability of I R , [6-10]. Many failed devicesafter operation at high temperature exhibit loss of currentblocking capability due to electrical short-circuit of a PNjunction.The purpose of this work is to provide new results regardingthe influence of the silicon-dielectric interface from thejunction edge on reliability of high voltage silicon devicesduring operation at high temperature.II. DEVICE PN JUNCTION TERMINATIONS AND THESEMICONDUCTOR –DIELECTRIC INTERFACEPlanar and plane junction terminations are used in most ofcommercial power semiconductor devices available at thistime. Planar junctions under bias voltage are shown in Fig.1a,b.A silicon dioxide (SiO 2 ) layer covering the PN junctionperipheral region is usually used as passivating dielectricmaterial. For high voltage devices, outside the PN junction, P +diffused rings are used to improve the current blockingcapability. Direct transition from the semiconductor materialwith its properties to dielectric material with its properties, i.e.ideal interface like in Fig.1a is not possible. From the physicsof semiconductor surfaces it is known that a layer existingunder the terminating atoms has different properties incomparison with the bulk of semiconductor material. At thetransition between the semiconductor material and thedielectric material, a thin heterogeneous (or interfacial) layerformed by the terminating layer from semiconductor materialand the terminating layer from dielectric material is manifested.Such interfacial layer can include traces of foreign atoms ordefects remained at the semiconductor surface from cleaning orpossible contamination. At reverse bias voltage a depletionlayer is formed in the junction bulk (region delineated by thedotted line). In the case of ideal interface for planar junction(Fig.1a) or plane junction (Fig. 1c) the leakage reverse current,I R, is given only by current flow in the depletion layer. At thejunction periphery, this current blocking depletion layer is indirect contact with the dielectric layer and no current leakage ispossible at the interface. This is the model used in the theory ofjunction electrical characteristic. In this case, I R = I RB, where I RBis the leakage current caused by the bulk depletion layer.For real interface (Fig.1b and d) an extension of thedepletion layer in the thin interfacial layer with the same©EDA Publishing/THERMINIC 2008 142ISBN: 978-2-35500-008-9