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24-26 September 2008, Rome, Italyalso need appropriate levels, i.e. have to be connected to U CB be noise free and properly grounded to the tester. This meansor GND so that the gate control be inhibited. Then, applying practically that it should be part of the tester.a positive I E current on the OUT output we can measure apure thermal transient as the gate is insulated at all times.Fig. 17 Simplified schematic of a high-side MOS switchCase study 5 : Normally ON devicesNumerous 3-pole devices allow flowing current at zero gatevoltage, among others depletion MOSFETs, JFETs, MES-FETs, HEMTs etc. Fig. 18 shows output characteristics of aHEMT device.Fig. 18 Output characteristics of a HEMT deviceThese devices behave like other 3-pole devices and can bemeasured in the setup of Fig. 2. Changing the drain voltagebetween U2 and U1 at nearly constant IE we can apply anappropriate power step. However, as we can deduce fromFig. 18 and Fig. 19 a positive source voltage of approximately~2V can cause I E to be outside the safe operationarea.Fig. 19 Measurement of normally ON devicesAn external voltage can be used for shifting the gate voltageso that the source be below zero. However, this source has toFig. 20 External perturbation on the thermal signalSometimes we see perturbations on the signal like in Fig. 20.This can be caused by ground loops, noise from computersor monitors, or in this case from an external supply. For findingthe source of the noise we have to analyse the frequencyand amplitude of it as illustrated in the picture.IV. CONCLUSIONSIn case of complex circuitry thermal transient measurementshave to be done on properly selected powering and sensingstructures. The powering structures have to coincide with theones used at normal operation. Sensing structures offer awide choice, but transfer effects have to be treated properly.For fast thermal response the control logic has to be disabledin a way resembling the actual control mechanism.Complex circuits and modules can be best analysed if theaccessibility of structures is ensured during the design phase.Nowadays circuit design enabling thermal testing should bea must.REFERENCES[1] G. Farkas, A. Poppe, E. Kollár, P.Stehouwer: Compact modelsof cooling mounts for fast board level design. Proc of SEMI-THERM XIX, March 2003, San Jose,CA,USA, pp. 255-262[2] G. Farkas, Q. van Voorst Vader, A. Poppe, Gy. Bognár: Thermalinvestigation of high power optical devices by transient testing,IEEE Transactions on Components and Packaging Technologies,Vol. 28, Issue 1, March 2005 pp 45 - 50[3] B.S. Siegel: Measuring thermal resistance is the key to a coolsemiconductor, Electronics,V.51,pp.121-126 (1978)[4] V. Székely and Tran Van Bien: Fine structure of heat flow pathin semiconductor devices: a measurement and identification method,Solid-State Electronics, V.31, pp.1363-1368 (1988)[5] www.micred.com/strfunc.html[6] Yan Zhang; G. Farkas, A. Poppe, A. Manning, A.; G.Yip, D.Mullen: Thermal Analysis of Memory Module Using TransientTesting Method, Proc of SEMI-THERM XXIII, March 2007, SanJose,CA,USA, pp. 7-11©EDA Publishing/THERMINIC 2008 111ISBN: 978-2-35500-008-9