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Real{Zth} and Im{Zth} (°C/W)3020100-101 1E1 1E2 1E3 1E4 1E524-26 September 2008, Rome, ItalyUnitary bi-cellsFig. 3 Thermal impedance extracted from input impedance measurementsof a GaAs HBT brazed on a copper carrierThis method is specific to bipolar transistors since thevariation of the input impedance is used to extract thethermal impedance. Moreover, this technique is easy tosetting up because it doesn’t require pulsed bias point ortemperature control like traditional electric methods basedon pulsed measurements.III. 3D FINITE ELEMENTS THERMAL SIMULATIONThe 3D physics-based analyses are performed withANSYS. ANSYS is a powerful FE software. The first stageconsists in a geometric description taking into account of theseveral materials layers constituting the transistor device.Then, an appropriate and pertinent mesh must be appliedregarding the complexity of the structure. Solving such asystem of several tens of thousands elements can quicklyrequire considerable computing resources and increasecomputation time. In most cases, symmetric considerationsallow to describe only half (or a quarter) of the full deviceand hence also reduce the number of elements. The heatsources are localized in the junctions where the high currentdensity and the important electric field occur. Typically, abaseplate temperature is applied at the bottom of the deviceas the temperature of reference. Fig. 4 shows the 3D modelof the GaAs HBT used for the simulations. A thermal bridgehas been realized on the top of the transistor to dissipate theheat and equilibrate the temperature. The carrier is notdirectly included. It is added thereafter and connected at thebottom of the transistor.The thermal properties of the materials used in thetransistor 3D modeling are referenced in Table 1.Table 1 Material thermal propertiesMaterials K(W/(m.K)) C p (J/(Kg.°C)) ρ(Kg/m 3 )GaAs 55 330 5320Au 315 129 19300Cu 398 385 8960Kovar 17 439 8360BCB 0.2 1200 1050Even if ANSYS can take into account of the non linearnature of the thermal conductivity, we have consideredconstant thermal properties in order to extract the systemmatrices and proceed to a reduction method (see section IV).Fig. 4 A 10x2x110_10 multi-fingers GaAs HBT structure mesh withANSYSThe ANSYS physics-based analysis generally gives goodapproximations of the ‘real’ temperature increase within thetransistor for mature technologies devices even if somesimplifications like isotropic properties, homogeneousmaterials and contact thermal resistors null are assumed.As examples of results that we can expect from a 3D FEthermal simulator such as ANSYS, Fig. 5 and Fig. 6illustrate the curves of the simulated temperatures:respectively, the transient temperatures in the junctions ofthe fingers and the side view of the steady state of the spatialthermal distribution within the transistor. These simulationsconcern the transistor brazed on a Copper carrier. Abaseplate temperature of T 0 = 20°C and a total dissipatedpower of P = 0.5W has been applied as initial conditions.The power is equally distributed in each finger.34323028262422Heat sources location201,00E-07 1,00E-06 1,00E-05 1,00E-04 1,00E-03 1,00E-02 1,00E-01Fig. 5 Transient temperatures in fingers of the GaAs HBT brazed oncopper carrier, T 0=20°C and P=0.5WFirst we can see the thermal coupling between the fingerswhich traduces a temperature offset of 10% on the finaltemperature between the external finger and the centralfinger. The simulations also have shown that an importantpart of the heat flux is evacuated toward the bottom of the©EDA Publishing/THERMINIC 2008 191ISBN: 978-2-35500-008-9