Lecture Notes in Computer Science 4917

4 M. Valero and J. Labarta
future systems design. Hierarchies will show up at all levels from processor
to node and system design, both in the hardware and in the software.
The development of programming models (extending current ones or
developing new ones) faces a challenge of providing the mechanism to
express a certain level of hierarchy (but not too much/detailed) that
can be matched by compilers, run times and OSs to the potentially very
different underlying architectures. Programmability and portability of
the programs (both functional and performance wise, both forward and
backwards) is a key challenge for these systems.
The approach to address a massively parallel and hierarchical system
with load balancing issues will require coordination between different
scheduling/resource allocation policies and a tight integration of the design
of the components at all levels: processor, interconnect, run time,
programming model, applications, OS scheduler, storage and Job scheduler.
By approaching the way of operation between supercomputers and
general purpose, this zero billion dollar market can play a very important
role of future unified-computing.
Biography of Mateo Valero
Mateo Valero obtained his PhD at UPC in 1980. He is a professor in the
Computer Architecture Department at UPC. His research interests focus
on high performance architectures. He has published approximately 400
papers on these topics. He is the director of the Barcelona Supercomputing
Center, the National Center of Supercomputing in Spain. Dr. Valero
has been honored with several awards. Among them, the Eckert-Mauchly
Award in 2007, by the IEEE, Institute of Electrical and Electronics Engineers
and the ACM, the Association for Computing Machinery, the King
Jaime I in research by the Generalitat Valenciana in 1997 presented by
the Queen of Spain, and two Spanish National awards, the Julio Rey Pastor
in 2001, to recognize research on IT technologies, and the Leonardo
Torres Quevedo in 2006, to recognize research in Engineering, by the
Spanish Ministery of Science and Technology, presented by the King of
Spain.
In December 1994, Professor Valero became a founding member of
the Royal Spanish Academy of Engineering. In 2005 he was elected Correspondant
Academic of the Spanish Royal Academy of Science and in
2006, member of the Royal Spanish Academy of Doctors. In 2000 he became
a Fellow of the IEEE. In 2002, he became an Intel Distinguished
Research Fellow and a Fellow of the ACM, the Association for Computing
Machinery. In 1998 he won a Favourite Son Award of his home town,
Alfamn (Zaragoza) and in 2006, his native town of Alfamn named their
Public College after him.
Biography of Jess Labarta
Jess Labarta is full professor on Computer Architecture at the Technical
University of Catalonia (UPC) since 1990. Since 1981 he has been lecturing
on computer architecture, operating systems, computer networks
and performance evaluation. His research interest has been centered on