Lecture Notes in Computer Science 4917

8 Experimental Results
MIPS MT: A Multithreaded RISC Architecture 17
The following are experimental results obtained on an FPGA implementation of the
34K processor with 5TCs, running on the MIPS Malta development board, using the
ROPEbench framework developed by Jacob Leverich of Stanford. Each benchmark is
run for a constant large number of iterations, divided among some number of software
threads. The results are the calculated cycles-per-iteration.
On a uniprocessor configuration, each software thread is a pthread, time-sharing a
single virtual CPU. In the SMTC configurations, each pthread represents a kernel thread
scheduled according to standard SMP algorithms across 5 virtual CPUs. In the ROPE
configuration, each pthread represents a ROPE microthread, of which the kernel has no
direct knowledge. The uniprocessor and “SMTC-PT” systems use the pthread mutex
implementation of the Linux glibc 2.4. The “SMTC-ITC” and ROPE systems use an experimental
library using MIPS MT ITC cells mapped into the program’s address space.
8.1 Synchronization
The “Ferris wheel” benchmark measures synchronization costs between threads, where
N threads are organized as a logical ring, each repeatedly acquiring a lock that must first
be released by its predecessor. It’s inner loop is:
for (i = 0; i < count; i++) {
lock(wheel, me);
unlock(wheel, next);
}
Cycles/
Iteration
Table 1. Ferris Wheel
1 Thread 2 Threads 3 Threads 4 Threads 5 Threads
Uniprocessor 414 2046 2494 2792 3004
SMTC-PT 572 2052 11833 13556 14451
SMTC-ITC 27 19 19 19 19
ROPE 26 18 18 18 18
There are two noteworthy phenomena here. One is that the classical software pthread
implementation degrades significantly as SMP threads are added. In the uniprocessor
case, it is only by a rare accident of pre-emption that there will be contention for a lowlevel
lock, but with multiple concurrent instruction streams active, such contention becomes
increasingly likely.
The second phenomenon worth noting is that using the MIPS MT ITC store to implement
the mutex in hardware is more than an order of magnitude faster, and does not
suffer from the same scaling problems.