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Lecture Notes in Computer Science 4917

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Code Arrangement of Embedded Java Virtual Mach<strong>in</strong>e for NAND Flash Memory 375<br />

of BytecodeFetch<strong>in</strong>g and LookupTable is about 1200 bytes (compiled with arm-elfgcc-3.4.3),<br />

which is almost small enough to fit <strong>in</strong>to two or three 512-bytes-page.<br />

Figure 8 showed the size distribution of bytecode handlers. The average size of a<br />

bytecode handler is 131 bytes, and there are 79 handlers smaller than 56 bytes. In the<br />

other words, a 512-bytes-page could gather 4 to 8 bytecode handlers. The <strong>in</strong>trahandler<br />

execution flow dom<strong>in</strong>ates the number of cache misses generated by the<br />

<strong>in</strong>terpreter. This is the reason that our approach tried to rearrange bytecode handlers<br />

with<strong>in</strong> the BytecodeDispatch trunk.<br />

Fig. 6. Distribution of Bytecode Handler Size (compiled with gcc-3.4.3)<br />

4 Analyz<strong>in</strong>g Control Flow<br />

4.1 Indirect Control Flow Graph<br />

Typical approaches derive the code placement of a program from its control flow<br />

graph (CFG). However, the CFG of a VM <strong>in</strong>terpreter is a special case, its CFG is a<br />

flat spann<strong>in</strong>g tree enclosed by a loop. All bytecode handlers are always sibl<strong>in</strong>g code<br />

blocks <strong>in</strong> the aspect of CFG regardless of executed Java applications. Therefore, the<br />

CFG does not provide <strong>in</strong>formation to dist<strong>in</strong>guish the temporal order between each<br />

bytecode handler. If someone wants to improve the program locality by observ<strong>in</strong>g the<br />

dynamic execution order of program blocks, and CFG is apparently not a good tool to<br />

this end. Therefore, we proposed a concept called “Indirect Control Flow Graph”<br />

(ICFG); it uses the dynamic <strong>in</strong>struction sequence to construct the dual CFG of the<br />

<strong>in</strong>terpreter.<br />

Consider a simplified virtual mach<strong>in</strong>e with 5 bytecode <strong>in</strong>structions: A, B, C, D,<br />

and E. Besides, take the follow<strong>in</strong>g short alphabetic sequences as the <strong>in</strong>put to the<br />

simplified virtual mach<strong>in</strong>e:<br />

A-B-A-B-C-D-E-C<br />

Each letter <strong>in</strong> the sequence represents a bytecode <strong>in</strong>struction. In Figure 7, the graph<br />

connected with the solid l<strong>in</strong>es is the CFG of the simplified <strong>in</strong>terpreter. Yet, this CFG<br />

cannot convey whether handler B will be called after handler A is executed.<br />

Therefore, we construct the ICFG by us<strong>in</strong>g the dashed directed l<strong>in</strong>es to connect the<br />

bytecode handlers <strong>in</strong> the order of the <strong>in</strong>put sequence. Actually, the Figure 8 expresses<br />

the ICFG <strong>in</strong> a readable way.

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