Lecture Notes in Computer Science 4917

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Drug Design Issues on the Cell BE 189 the re-use of data within of the SPE, and so, reducing the amount of DMA transfers to main memory, significantly improves the performance of the application. In any case, double buffering is necessary to achieve good performance. Vectorization is important when porting code to the SPEs. Large performance degradation may happen in the case of using scalar code. However, offloading functions, vectorized or not, that access large amounts of data without exploiting temporal locality, is crucial for scalability and for avoiding current memory hierarchy access bottlenecks. We have shown significant performance improvements when accessing data from a SPE, compared to accessing the same data from the PPE. Finally, the 3x speedup achieved compared to a Power5 multicore shows the potential of this heterogeneous multiprocessor, and makes worth enough the porting effort. However, automatic mechanisms [3], as a first approximation, would help to accelerate application porting to Cell. Acknowledgements We would like to acknowledge Alex Ramirez and Xavi Martorell for their insightful comments while analyzing the data collected in the experiments. Also, to Sergi More for their technical assistance, and reviewers for their contributions to this paper. This work has been performed in the Cell BE-based blades in the Barcelona Supercomputing Center, obtained through the IBM SUR Program. The work has been supported by the European Comission in the context of the SARC project (contract no. 27648), the HiPEAC fellowship grants for Cecilia Gonzalez and Daniel Cabrera, and the Spanish Ministry of Education (contract no. TIN2004-07739-C02-01, TIN2007-60625). References 1. http://CellPerformance.com 2. Cell broadband engine programming handbook v1.0 3. Bellens, P., Perez, J.M., Badia, R.M., Labarta, J.: CellSs: A programming model for the cell be architecture. In: Conference on Supercomputing (2006) 4. Blagojevic, F., et al.: Dynamic multigrain parallelization on the cell broadband engine. In: PPoPP (2007) 5. Blagojevic, F., et al.: RAxML-Cell: Parallel phylogenetic tree inference on the cell broadband engine. In: Proceedings of the 21st IEEE/ACM International Parallel and Distributed Processing Symposium (2007) 6. Chelliah, V., et al.: Efficient restraints for protein-protein docking by comparison of observed amino acid substitution patterns with those predicted from local environment. In: JMB 357 (2006) 7. Chen, T., et al.: Cell broadband engine architecture and its first implementation 8. Choi, J., et al.: Parallel matrix transpose algorithms on distributed memory concurrent computers. Parallel Computing 21(9), 1387–1405 (1995) 9. Chow, A.C., et al.: A programming example: Large FFT on the cell broadband engine. White Paper IBM (2005)
190 H. Servat et al. 10. Eklundh, J.: A fast computer method for matrix transposing. IEEE transactions on computers 21, 801–803 (1972) 11. Eleftheriou, M., et al.: Scalable framework for 3D FFTs on the blue gene/l supercomputer: Implementation and early performance measurements. IBM J. RES. & DEV 49(2/3) (2005) 12. Fernández-Recio, J., Totrov, M., Abagyan, R.: Soft protein-protein docking in internal coordinates. Protein Science 11V, 280–291 (2002) 13. Flachs, B., et al.: The Microarchitecture of the Synergistic Processor for a Cell Processor. IEEE Journal of Solid-State Circuits 41(1)V (2006) 14. Gabb, H.A., et al.: Modelling protein docking usign shape complementary, electrostatics and biochemical information. J. Mol. Biol. 272 (1997) 15. Govindaraju, N.K., et al.: A memory model for scientific algorithms on graphics processors. In: Proceedings of the 2006 ACM/IEEE conference on Supercomputing, p. 89. ACM Press, New York (2006) 16. Greene, J., Cooper, R.: A parallel 64k complex FFT algorithm for the ibm/sony/toshiba cell broadband engine processor. In: Tech. Conf. Proc. of the Global Signal Processing Expo (GSPx) (2005) 17. Gschwind, M., et al.: Synergistic Processing in Cell’s Multicore Architecture. IEEE Micro 26(2) (March 2006) 18. Jimenez-Gonzalez, D., et al.: Performance analysis of cell broadband engine for high memory bandwidth applications. In: ISPASS (2007) 19. Kahle, J.A., et al.: Introduction to the Cell multiprocessor. IBM Journal of Research and Development 49(4/5) (2005) 20. Katchalski-Katzir, E., et al.: Molecular sufrace recognition: Determination of geometric fit between proteins and their ligands by correlation techniques. Proc. Natl. Acad. Sci. USA, Biohphysics 89, 2195–2199 (1992) 21. Knuth, D.: The art of computer programming: Sorting and searching. Addison- Wesley Publishing Company 3 (1973) 22. Krolak, D.: Unleashing the cell broadband engine processor. MPR Fall Processor Forum (November 2005) 23. Naga, K., Govindaraju, D.M.: Cache-Efficient Numerical Algorithms using Graphics Hardware. Tech. rep., UNC (2007) 24. Wang, D.: Cell mircroprocessor iii. Real World Technologies (2005)
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Lecture Notes in Computer Science 4
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Volume Editors Per Stenström Chalm
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VI Preface The planning of a confer
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VIII Organization Mahmut Kandemir P
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Invited Program Table of Contents S
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Table of Contents XIII Turbo-ROB: A
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4 M. Valero and J. Labarta future s
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MIPS MT: A Multithreaded RISC Archi
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2.2 VPEs as Scheduling Domains MIPS
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MIPS MT: A Multithreaded RISC Archi
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6.1 Thread Context Virtualization M
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8 Experimental Results MIPS MT: A M
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Cycles/ Iteration MIPS MT: A Multit
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9 Conclusions MIPS MT: A Multithrea
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MPI: Message Passing on Multicore P
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overhead per word (cycles) 1200 100
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speedup 3.5 3 2.5 2 1.5 1 0.5 0 rMP
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speedup 9 8 7 6 5 4 3 2 1 0 rMPI: M
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Modeling Multigrain Parallelism on
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BRAM-LUT Tradeoff on a Polymorphic
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32 L0 L1 BRAM-LUT Tradeoff on a Pol
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Architecture Enhancements for the A
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Implementation of an UWB Impulse-Ra
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Fast Bounds Checking Using Debug Re
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Studying Compiler Optimizations on
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CLI as an Effective Deployment Form
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244 Y. Sazeides et al. of mispredic
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246 Y. Sazeides et al. Affector BB1
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248 Y. Sazeides et al. 2.3 How to U
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250 Y. Sazeides et al. Cumulative D
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252 Y. Sazeides et al. ijpeg, andbo
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254 Y. Sazeides et al. Misses/KI 12
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256 Y. Sazeides et al. Mahlke and N
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260 P. Akl and A. Moshovos Original
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264 P. Akl and A. Moshovos new firs
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268 P. Akl and A. Moshovos 80% 70%
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272 P. Akl and A. Moshovos [4] Burg
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References Compiler Techniques for
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400 Author Index Shajrawi, Yousef 3
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