Lecture Notes in Computer Science 4917

9 Conclusions
MIPS MT: A Multithreaded RISC Architecture 21
The MIPS MT architecture represents another case of supercomputer architecture techniques
of the 20th century finding application in the embedded systems of the 21st
century. The effectiveness of multithreading for latency tolerance is demonstrable in
small-scale systems. The effectiveness of multithreading for latency avoidance, given
the architectural support of MIPS MT, is less hostage to other system design parameters,
and at least as relevant to practical application in real-time and embedded domains.
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