21.01.2013 Views

Lecture Notes in Computer Science 4917

Lecture Notes in Computer Science 4917

Lecture Notes in Computer Science 4917

SHOW MORE
SHOW LESS

Create successful ePaper yourself

Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.

LPA: A First Approach to the Loop Processor Architecture 287<br />

3. Parikh, D., Skadron, K., Zhang, Y., Barcella, M., Stan, M.: Power issues related to<br />

branch prediction. In: Proceed<strong>in</strong>gs of the 8th International Symposium on High-<br />

Performance <strong>Computer</strong> Architecture (2002)<br />

4. Folegnani, D., González, A.: Energy-effective issue logic. In: Proceed<strong>in</strong>gs of the<br />

28th International Symposium on <strong>Computer</strong> Architecture (2001)<br />

5. Cristal, A., Santana, O., Cazorla, F., Galluzzi, M., Ramírez, T., Pericàs, M., Valero,<br />

M.: Kilo-<strong>in</strong>struction processors: Overcom<strong>in</strong>g the memory wall. IEEE Micro 25(3)<br />

(2005)<br />

6. Monreal, T., González, J., González, A., Valero, M., Viñals, V.: Late allocation<br />

and early release of physical registers. IEEE Transactions on <strong>Computer</strong>s 53(10)<br />

(2004)<br />

7. Gwennap, L.: Digital 21264 sets new standard. Microprocessor Report 10(14)<br />

(1996)<br />

8. Sherwood, T., Perelman, E., Calder, B.: Basic block distribution analysis to f<strong>in</strong>d<br />

periodic behavior and simulation po<strong>in</strong>ts <strong>in</strong> applications. In: Proceed<strong>in</strong>gs of the 15th<br />

International Conference on Parallel Architectures and Compilation Techniques<br />

(2001)<br />

9. Thornton, J.E.: Parallel operation <strong>in</strong> the Control Data 6600. In: Proceed<strong>in</strong>gs of the<br />

AFIPS Fall Jo<strong>in</strong>t <strong>Computer</strong> Conference (1964)<br />

10. Tomasulo, R.M.: An efficient algorithm for exploit<strong>in</strong>g multiple arithmetic units.<br />

IBM Journal of Research and Development 11(1) (1967)<br />

11. Anderson, D.W., Sparacio, F.J., Tomasulo, R.M.: The IBM System/360 model<br />

91: Mach<strong>in</strong>e philosophy and <strong>in</strong>struction-handl<strong>in</strong>g. IBM Journal of Research and<br />

Development 11(1) (1967)<br />

12. Lee, L.H., Moyer, W., Arends, J.: Instruction fetch energy reduction us<strong>in</strong>g loop<br />

caches for embedded applications with small tight loops. In: International Symposium<br />

on Low Power Electronics and Design (1999)<br />

13. Rivers, J.A., Asaad, S., Wellman, J.D., Moreno, J.H.: Reduc<strong>in</strong>g <strong>in</strong>struction fetch<br />

energy with backward branch control <strong>in</strong>formation and buffer<strong>in</strong>g. In: International<br />

Symposium on Low Power Electronics and Design (2003)<br />

14. Sherwood, T., Calder, B.: Loop term<strong>in</strong>ation prediction. In: Proceed<strong>in</strong>gs of the 3rd<br />

International Symposium on High Performance Comput<strong>in</strong>g (2000)<br />

15. de Alba, M.R., Kaeli, D.R.: Path-based hardware loop prediction. In: Proceed<strong>in</strong>gs<br />

of the International Conference on Control, Virtual Instrumentation and Digital<br />

Systems (2002)<br />

16. Vajapeyam, S., Mitra, T.: Improv<strong>in</strong>g superscalar <strong>in</strong>struction dispatch and issue<br />

by exploit<strong>in</strong>g dynamic code sequences. In: Proceed<strong>in</strong>gs of the 24th International<br />

Symposium on <strong>Computer</strong> Architecture (1997)<br />

17. Vajapeyam, S., Joseph, P.J., Mitra, T.: Dynamic vectorization: A mechanism for<br />

exploit<strong>in</strong>g far-flung ILP <strong>in</strong> ord<strong>in</strong>ary programs. In: Proceed<strong>in</strong>gs of the 24th International<br />

Symposium on <strong>Computer</strong> Architecture (1999)<br />

18. Talpes, E., Marculescu, D.: Execution cache-based microarchitectures for powerefficient<br />

superscalar processors. IEEE Transactions on Very Large Scale Integration<br />

(VLSI) Systems 13(1) (2005)

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!