Lecture Notes in Computer Science 4917

202 P. Raghavan et al.
power consumption of the complete system can be analyzed and optimized (either by a
change in architecture or a compiler optimization or transformation).
To validate our framework, the energy consumption of an in-house processor
SyncPro[13] 2 running WLAN Synchronization was compared to same processor modeled
in the proposed COFFEE flow. The processor was designed separately and there
was no sharing of tools/sources between this design and our flow. As a reference, detailed
gate-level simulation (after synthesis, placement+routing and extraction) were
performed on WLAN synchronization code. The power was then estimated using Prime-
Power. For more details on the precise flow used for estimating energy consumption
for SyncPro, the reader is refered to [13]. The same code was then run on the COFFEE
framework to estimate the power consumption. The net error in the estimated energy
using the COFFEE estimation and the energy estimate from PrimePower and gate level
simulation is less than 13% for the complete platform (including the memories). More
validation points against other processors are currently being added.
5 Experimental Setup and Results
In this section we demonstrate the COFFEE framework on a representative benchmark
for two state of the art processors (TI’s C64 and ARM’s Cortex-A8). We further illustrate
the potential of architectural design space exploration on a standard embedded
VLIW.
5.1 Benchmark Driver: WCDMA
WCDMA is a Wideband Direct-Sequence Code Division Multiple Access (DS-CDMA)
system, i.e. user information bits are spread over a wide bandwidth by multiplying the
user data with quasi-random bits derived from CDMA spreading codes. WCDMA [22]
is one of the dominant 3G cellular protocols for multimedia services, including video
telephony on a wireless link.
Frontend
Tx Filter
WCDMA Transmitter
Scrambler Spreader Interleaver
Channel
Encoder
Rx Filter Demodulator Deinterleaver Channel Decoder
WCDMA Receiver
Fig. 5. Wideband CDMA as in Signal Processing On Demand (SODA, [23])
2
[13] is a 5 issue SIMD VLIW and heterogenous distributed register file and a novel interconnection
network.
To higher layers