Lecture Notes in Computer Science 4917

COFFEE: COmpiler Framework for Energy-Aware
Exploration
Praveen Raghavan 1,2 , Andy Lambrechts 1,2 ,JavedAbsar 1,2,3 , Murali Jayapala 1 ,
Francky Catthoor 1,2 , and Diederik Verkest 1,2,4
1 IMEC vzw, Heverlee, Belgium
{ragha,lambreca,absar,jayapala,catthoor,verkest}@imec.be
2 ESAT, KULeuven, Leuven, Belgium
3 ST Microelectronics, Singapore
4 Dept. of Electrical Engineering, VUB, Brussels, Belgium
Abstract. Modern mobile devices need to be extremely energy efficient. Due to
the growing complexity of these devices, energy aware design exploration has
become increasingly important. Current exploration tools often do not support
energy estimation, or require the design to be very detailed before the estimate
is possible. It is important to get early feedback on both performance and energy
consumption during all phases of the design and at higher abstraction levels. This
paper presents a unified optimization and exploration framework, from source
level transformation to processor architecture design. The proposed retargetable
compiler and simulator framework can map applications to a range of processors
and memory configurations, simulate and report detailed performance and
energy estimates. An accurate energy modeling approach is introduced, which
can estimate the energy consumption of processor and memories at a component
level, which can help to guide the design process. Fast energy-aware architecture
exploration is illustrated using an example processor. The flow is demonstrated
using a representative wireless benchmark on two state of the art processors and
on a processor with advanced low power extensions for memories. The framework
also supports exploration of various novel low power extensions and their
combinations. We show that a unified framework enables fast feedback on the
effect of source level transformations of the application code on the final cycle
count and energy consumption.
1 Introduction and Motivation
Modern consumers demand portable devices that provide functionality comparable to
that of their non-mobile counterparts, but still having a long battery life. In order to
achieve these ambitious goals, designers need to optimize all parts of these systems. At
the same time an efficient mapping of the application code onto the platform is key to
achieve a high energy efficiency. A mapping can be considered to be efficient if it is
using the available hardware to its full potential.
Currently energy estimation is often only performed at the final stage of the design,
when the hardware is completely fixed and gate level simulations are possible.
This approach restricts extensive energy driven architecture exploration, taking into account
the impact of the compiler and possible transformations on the source code. When
P. Stenström et al. (Eds.): HiPEAC 2008, LNCS 4917, pp. 193–208, 2008.
c○ Springer-Verlag Berlin Heidelberg 2008