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Lecture Notes in Computer Science 4917

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Compilation Strategies for Reduc<strong>in</strong>g Code Size on a VLIW Processor 151<br />

3.2 The Fetch Packet Header<br />

Fig. 3. C64+ fetch packet formats<br />

Fig. 4. Compact <strong>in</strong>struction header format<br />

The C64+ has a new type of fetch packet that encodes a mixture of 16-bit<br />

and 32-bit <strong>in</strong>structions. Thus, there are two k<strong>in</strong>ds of fetch packets: A standard<br />

fetch packet that conta<strong>in</strong>s only 32-bit <strong>in</strong>structions and a header-based fetch<br />

packet that conta<strong>in</strong>s a mixture of 32- and 16-bit <strong>in</strong>structions. Figure 3 shows<br />

a standard fetch packet and an example of a header-based fetch packet. Fetch<br />

packet headers are detected by look<strong>in</strong>g at the first four bits of the last word <strong>in</strong> a<br />

fetch packet. A previously unused creg/z value <strong>in</strong>dicates that the fetch packet is<br />

header-based. The header-based fetch packet encodes how to <strong>in</strong>terpret the bits<br />

<strong>in</strong> the rest of the fetch packet. On C64+, execute packets may span standard<br />

and header-based fetch packets.<br />

Figure 4 shows the layout of the fetch packet header. The predicate field used<br />

to signify a fetch packet header occupies four bits (bits 28-31). There are seven<br />

layout bits (bits 21-27) that designate if the correspond<strong>in</strong>g word <strong>in</strong> the fetch<br />

packet is a 32-bit <strong>in</strong>struction or a pair of 16-bit <strong>in</strong>structions. Bits 0-13 are p-bits

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