Lecture Notes in Computer Science 4917

MPI: Message Passing on Multicore Processors with On-Chip Interconnect 35
above for the matrix multiplication application. In these cases, the messages are quite
small (20 words or less), so sending many more, as in the 16 processor case, affects
LAM/MPI’s performance more drastically than it does rMPI’s.
In general, though, both applications achieve speedups ranging from approximately
6x – 14.5x on both rMPI and LAM/MPI. These speedups are larger than that of matrix
multiply and jacobi, which algorithmically have significantly lower computation-tocommunication
ratios. The results for all four applications evaluated agree with intuition:
rMPI and LAM/MPI both exhibit better performance scalability for applications
with larger computation-to-communication ratios.
5 Related Work
A large number of other message passing work have influenced this work. The iWarp
system [5], [16] attempted to integrate a VLIW processor and fine-grained communication
system on a single chip. The INMOS transputer [4] had computing elements
that could send messages to one another. The MIT Alewife machine [19] also contained
support for fast user-level messaging. Other multicore microprocessors include VIRAM
[18], Wavescalar [29], TRIPS [23], Smart Memories [21], [22], and the Tarantula [7]
extension to Alpha. Some commercial chip multiprocessors include the POWER 4 [8]
and Intel Pentium D [1]. This work is applicable to many newer architectures that are
similar to Raw in that they contain multiple processing elements on a single chip.
This paper primarily concentrated on Raw’s dynamic network, but much work has
been done using Raw’s static network, which operates on scalar operands. Prior work
[33], [12] shows considerable speedups can result using the static network for stream
computation. Additionally, there exist a number of compiler systems for Raw that automatically
generate statically-scheduled communication patterns. CFlow [13], for instance,
is a compiler system that enables statically-scheduled message passing between
programs running on separate processors. Raw’s rawcc [20] automatically parallelize C
programs, generating communication instructions where necessary.
While this paper showed that MPI can be successfully ported to a multicore architecture,
its inherent overhead causes it to squander the multicore opportunity. The Multicore
Association’s CAPI API [3] offers a powerful alternative—a lightweight API for
multicore architectures that is optimized for low-latency inter-core networks, and boasts
a small memory footprint that can fit into in-core memory. There also exist a number of
MPI implementations for a variety of platforms and interconnection devices, including
MPICH [34], LAM/MPI [6], and OpenMPI [11]. [17] discusses software overhead in
messaging layers.
6 Conclusion
This paper presented rMPI, an MPI-compliant message passing library for multi-core
architectures with on-chip interconnect. rMPI introduces robust, deadlock-free, mechanisms
to program multicores, offering an interface that is compatible with current MPI
software. Likewise, rMPI gives programmers already familiar with MPI an easy interface
with which to program Raw which enables fine-grain control over their programs.