Lecture Notes in Computer Science 4917

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35% 30% 25% 20% 15% 10% 5% 0% 164.gzip 168.wupwise 171.swim Turbo-ROB: A Low Cost Checkpoint/Restore Accelerator 269 ROB TROB_32 TROB_64 TROB_128 172.mgrid 173.applu 175.vpr 176.gcc 177.mesa 178.galgel 179.art 181.mcf 183.equake 186.crafty 187.facerec 188.ammp 189.lucas 191.fma3d 197.parser 252.eon 254.gap 255.vortex 256.bzip2 300.twolf 301.apsi Fig. 6. Per-benchmark and average performance deterioration relative to PERF with ROB-only recovery and TROB-only recovery as a function of the number of the TROB entries for a 128-entry window processor 70% 60% 50% 40% 30% 20% 10% 0% 164.gzip 168.wupwise 171.swim 172.mgrid ROB TROB_32 TROB_64 TROB_128 TROB_256 AVG 173.applu 175.vpr 176.gcc 177.mesa 178.galgel 179.art 181.mcf 183.equake 186.crafty 187.facerec 188.ammp 189.lucas 191.fma3d 197.parser 252.eon 254.gap 255.vortex 256.bzip2 300.twolf 301.apsi AVG Fig. 7. Per-benchmark and average performance deterioration relative to PERF with ROB-only recovery and TROB-only recovery as a function of the number of the TROB entries for a 256-entry window processor branch with a repair point proceeds via the TROB only, otherwise, it is necessary to use both the ROB and the sTROB. In the latter case, recovery proceeds first at the nearest subsequent repair point via the sTROB. It takes a single cycle to locate this repair point if it exists provided that we keep a small ordered list of all repair points at decode. Recovery completes via the ROB for the remaining instructions if any. Whenever the TROB is full, decode is not stalled but the current repair point if any is marked as invalid. This repair point and any preceding ones can no longer be used for recovery. Figure 8 shows the per-benchmark and average performance deterioration for sTROB recovery as a function of the number of sTROB entries. We use a 1K-entry table of 4-bit resetting counters to identify low confidence branches [8]. Very similar results were obtained with the zero-cost, anyweak estimator [11]. Average performance improves even with a 32-entry sTROB. These results demonstrate that the TROB can be used as
270 P. Akl and A. Moshovos 25% 20% 15% 10% 5% 0% 164.gzip 168.wupwise 171.swim 172.mgrid ROB sTROB_32 sTROB_64 sTROB_128 sTROB_256 sTROB_512 173.applu 175.vpr 176.gcc 177.mesa 178.galgel 179.art 181.mcf 183.equake 186.crafty 187.facerec 188.ammp 189.lucas 191.fma3d 197.parser 252.eon 254.gap 255.vortex 256.bzip2 300.twolf 301.apsi AVG Fig. 8. Per-benchmark and average performance deterioration relative to PERF with ROB-only recovery and sTROB recovery as a function of the number of sTROB entries a recovery accelerator on top of a conventional ROB. Comparing with the results of the next section, it can be seen that sTROB offers performance that is comparable to that possible with RAT checkpointing. 4.5 Turbo-ROB with GCs This section demonstrates that the TROB successfully improves performance even when used with a state-of-the-art GC-based recovery mechanism [2,1,11]. In this design, the TROB complements both a ROB and in-RAT GCs. The TROB accelerates recoveries for those branches that could not get a GC. Recent work has demonstrated that including additional GCs in the RAT (as it is required to maintain high performance for processors with 128 or more instructions in their window) greatly increases RAT latency and hence reduces the clock cycle. Accordingly, in this case the TROB reduces the need for additional RAT GCs offering a high performance solution without the impact on clock cycle. The TROB is off the critical path and it does not impact RAT latency as GCs do. Figure 9 shows the per-benchmark and average performance deterioration relative to PERF with (1) GC-based recovery (with one or four GCs), (2) sTROB, and (3) sTROB with GC-based recovery (sTROB with one or four GCs). We use a 1K-entry table of 4-bit resetting counters to identify low confidence branches [8]. A low confidence branch is given a GC if one is available, otherwise, a repair point is initiated for it in the TROB. If the TROB is full, decode stalls until space becomes available. In this experiments we use a 256entry sTROB. On average, the sTROB with only one GC outperforms the GCbased only mechanism that utilizes four GCs. When four GCs are used with the sTROB, performance deterioration is 0.99% as opposed to 2.39% when only four GCs are used. This represents a 59% reduction in recovery cost. These results demonstrate that the TROB is useful even with in RAT GC checkpointing.
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Lecture Notes in Computer Science 4
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Volume Editors Per Stenström Chalm
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VI Preface The planning of a confer
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VIII Organization Mahmut Kandemir P
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Invited Program Table of Contents S
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Table of Contents XIII Turbo-ROB: A
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4 M. Valero and J. Labarta future s
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MIPS MT: A Multithreaded RISC Archi
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2.2 VPEs as Scheduling Domains MIPS
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MIPS MT: A Multithreaded RISC Archi
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6.1 Thread Context Virtualization M
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8 Experimental Results MIPS MT: A M
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Cycles/ Iteration MIPS MT: A Multit
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9 Conclusions MIPS MT: A Multithrea
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MPI: Message Passing on Multicore P
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overhead per word (cycles) 1200 100
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speedup 3.5 3 2.5 2 1.5 1 0.5 0 rMP
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speedup 9 8 7 6 5 4 3 2 1 0 rMPI: M
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Modeling Multigrain Parallelism on
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BRAM-LUT Tradeoff on a Polymorphic
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32 L0 L1 BRAM-LUT Tradeoff on a Pol
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Architecture Enhancements for the A
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Implementation of an UWB Impulse-Ra
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Fast Bounds Checking Using Debug Re
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Studying Compiler Optimizations on
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avg normalized execution time 1.000
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CLI as an Effective Deployment Form
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Compilation Strategies for Reducing
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Experiences with Parallelizing a Bi
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Drug Design Issues on the Cell BE 1
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speed-up 8 6 4 2 0 FFT3D 256 64-A F
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COFFEE: COmpiler Framework for Ener
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Benchmark Source Code * transformed
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RTL for each Component * Gate−lev
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Normalized Cycle Count 1.00 0.90 0.
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Integrated CPU Cache Power Manageme
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References Compiler Techniques for
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Code Arrangement of Embedded Java V
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Aggressive Function Inlining: Preve
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400 Author Index Shajrawi, Yousef 3
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