Abstract-Band - Fakultät für Informatik, TU Wien - Technische ...

Institut für Technische Informatik
Arbeitsbereich Embedded Computing Systems
Alexander Burker
Implementation of the TTP/A Protocoland WCET Analysis on the SPEAR2
Platform
Studium: Masterstudium Technische Informatik
Betreuer: Ao.Univ.Prof. Dr. Andreas Steininger
This master's thesis shows the results of implementing the TTP/A protocol on
the SPEAR2 platform. The TTP/A protocol is a field bus protocol used in time
triggered environments and the protocol meets real-time system
requirements. The SPEAR2 platform comprises the processor and several
extension modules. The processor can work in a 16 and 32 bit data mode. For
the chosen implementation the 32 bit version is used. The processor provides
real-time system capabilities on the hardware side. The main aim of this
master's thesis is to implement the TTP/A protocol on the SPEAR2 platform
and to provide a proof for the assumption that the processor in conjunction
with the new eUART module and the TTP/A protocol is able to provide a
system which complies to real-time requirements. A substantial part of this
proof will be the development of WCET analyzable code using a coding style
that is based on the Single-Path Programming Model. The Single-Path
Programming Model was modified in some parts and this resulted in the
Single or Shorten-Path Programming Model. Furthermore the realised
implementation for static WCET analysis on the SPEAR2 platform will be
introduced. An own section of the thesis provides the knowledge on how the
resulting implementation can be used in own applications. The
implementation created provides a comfortable development environment
for the realisation of own TTP/A applications with multiple nodes.
Robert Najvirt
Description Methods for Asynchronous Circuits - A Comparison
Studium: Masterstudium Technische Informatik
Betreuer: Ao.Univ.Prof. Dr. Andreas Steininger
90
The advances of silicon manufacturing technology make it possible to
integrate billion-transistor systems on a single die but the price to pay is
higher parameter variability, resulting in problems with reliability, difficult
clock distribution, high power consumption and more. Proponents of asynchronous
circuits claim them to be a possible solution to most of these
problems and they are indeed becoming an increasingly interesting design
choice. The aim of this work is to describe the most established description
methods for asynchronous circuits, compare them in respect to a number of