12.11.2013 Views

Tweaking Optimizing Windows.pdf - GEGeek

Tweaking Optimizing Windows.pdf - GEGeek

Tweaking Optimizing Windows.pdf - GEGeek

SHOW MORE
SHOW LESS

Create successful ePaper yourself

Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.

Therefore, using the latest video BIOS is likely to boost performance and cut down on bugs. In addition, the latest drivers may not<br />

work with older versions of the video BIOS. So, it's advisable to keep updating the video BIOS whether you use real-mode DOS or<br />

not. This tip is courtesy of Adam Nellemann.<br />

Video ram cacheable<br />

This feature enables or disables the caching of the video RAM at A0000h-AFFFFh using the processor's Level 2 cache. This is<br />

supposed to speed up accesses to the video RAM. However, this actually does not translate into better system performance. Many<br />

graphics cards now have a RAM bandwidth of 5.3GB/s (128bit x 166MHz DDR) and that number is climbing rapidly. Meanwhile,<br />

most system only have SDRAM bandwidth of around 1.06GB/s (64bit x 133MHz) or 2.13GB/s (64bit x 133MHz x 2) with DDR<br />

SDRAM. As you can see, the average graphics cards' memory subsystem is at least 2.5 to 5 times faster than system memory.<br />

Therefore, it makes more sense to cache the slower system SDRAM instead of the graphics card's RAM.<br />

But even if you want to maximize the performance of the graphics card, caching the video RAM using the processor's L2 cache is<br />

actually quite pointless. This is because the video RAM communicates with the L2 cache via the AGP bus which has a maximum<br />

bandwidth of only 1.06GB/s using the AGP4X protocol. And that bandwidth is halved in this case because the data has to pass in<br />

two directions. So what it means in the end is that the caching of the video RAM has to be done via a 533MB/s-wide bottleneck!<br />

In addition, if any program writes into this memory area, it will result in a system crash. So, there's very little benefit in caching the<br />

video card's RAM. It would be much better to use the processor's L2 cache to cache the system memory instead. It is recommended<br />

that you disable Video RAM Cacheable for better performance. For more detailed information, take a look at the Video RAM Caching<br />

guide.<br />

MEMORY SUBSYSTEM<br />

Act bank a to b cmd delay<br />

Act Bank A to B CMD Delay (short for Activate Bank A to Activate Bank B Command Delay) or tRRD is a DDR timing parameter. It<br />

specifies the minimum amount of time between successive ACTIVATE commands to the same DDR device, even to different internal<br />

banks. The shorter the delay, the faster the next bank can be activated for read or write operations. However, because row<br />

activation requires a lot of current, using a short delay may cause excessive current surges.<br />

Because this timing parameter is DDR device-specific, it may differ from one DDR device to another. DDR DRAM manufacturers<br />

typically specify the tRRD parameter based on the row ACTIVATE activity to limit current surges within the device. If you let the<br />

BIOS automatically configure your DRAM parameters, it will retrieve the manufacturer-set tRRD value from the SPD (Serial Presence<br />

Detect) chip. However, you may want to manually set the tRRD parameter to suit your requirements.<br />

For desktop PCs, a delay of 2 cycles is recommended as current surges aren't really important. This is because the desktop PC<br />

essentially has an unlimited power supply and even the most basic desktop cooling solution is sufficient to dispel any extra thermal<br />

load that the current surges may impose. The performance benefit of using the shorter 2 cycles delay is of far greater interest. The<br />

shorter delay means every back-to-back bank activation will take one clock cycle less to perform. This improves the DDR device's<br />

read and write performance.<br />

Note that the shorter delay of 2 cycles works with most DDR DIMMs, even at 133MHz (266MHz DDR). However, DDR DIMMs<br />

running beyond 133MHz (266MHz DDR) may need to introduce a delay of 3 cycles between each successive bank activation. Select<br />

2 cycles whenever possible for optimal DDR DRAM performance. Switch to 3 cycles only when there are stability problems with the<br />

2 cycles setting. In mobile devices like laptops however, it would be advisable to use the longer delay of 3 cycles. Doing so limits<br />

the current surges that accompany row activations. This reduces the DDR device's power consumption and thermal output, both of<br />

which should be of great interest to the road warrior.<br />

Delay DRAM read latch<br />

This feature is similar to DRAM Read Latch Delay. It fine-tunes the DRAM timing parameters to adjust for different DRAM loadings.<br />

The DRAM load changes with the number as well as the type of DIMMs installed. DRAM loading increases as the number of DIMMs<br />

increases. It also increases if you use double-sided DIMMs instead of single-sided ones. In short, the more DRAM devices you use,<br />

the greater the DRAM loading. As such, a single single-sided DIMM provides the lowest DRAM load possible.<br />

With heavier DRAM loads, you may need to delay the moment when the memory controller latches onto the DRAM device during<br />

reads. Otherwise, the memory controller may fail to latch properly onto the desired DRAM device and read from it. Normally, you<br />

should let the BIOS select the optimal amount of delay from values preset by the manufacturer (using the Auto option). But if you<br />

notice that your system has become unstable upon installation of additional DIMMs, you should try setting the DRAM read latch<br />

delay yourself.<br />

The longer the delay, the poorer the read performance of your memory modules. However, the stability of your memory modules<br />

won't increase together with the length of the delay. Remember, the purpose of the feature is only to ensure that the memory<br />

controller will be able to latch onto the DRAM device with all sorts of DRAM loadings.<br />

The amount of delay should just be enough to allow the memory controller to latch onto the DRAM device in your particular<br />

situation. Don't unnecessarily increase the delay. It isn't going to increase stability. In fact, it may just make things worse! So, start<br />

with 0.5ns and work your way up until your system stabilizes.<br />

If you have a light DRAM load, you can ensure optimal performance by manually using the No Delay option. This forces the memory<br />

controller to latch onto the DIMMs without delay, even if the BIOS presets indicate that a delay is needed. Naturally, this can<br />

potentially cause stability problems if you actually have a heavy DRAM load. Therefore, if you find that your system has become<br />

unstable after using the No Delay option, simply revert back to the default value of Auto so that the BIOS can adjust the read latch<br />

delay to suit the DRAM load.<br />

DRAM act to prechrg cmd<br />

Like SDRAM Tras Timing Value, this feature controls the memory bank's minimum row active time (tRAS). This constitutes the<br />

length of time from the activate command to the precharge command of the same bank. Hence, the name DRAM Act to PreChrg<br />

CMD which is short for DRAM Activate Command to Precharge Command. Now, tRAS is important because it determines how soon

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!