Tweaking Optimizing Windows.pdf - GEGeek

By default, the parallel port uses DMA Channel 3 when in ECP mode. This works just fine in most situations so you shouldn't need to
change it. This feature was provided just in case one of your add-on cards requires the use of DMA Channel 3. In that case, you can
use this BIOS feature to force the parallel port to use the alternative DMA Channel 1. Otherwise, stick with the default setting of
Channel 3.
ECP mode select
This feature is usually found under the Parallel Port Mode feature. It's slaved to the EPP (Enhanced Parallel Port) options of the
Parallel Port Mode feature so if you do not enable either EPP or ECP+EPP, this feature will disappear from the screen or appear
grayed out. There are two versions of the EPP transfer protocol - EPP 1.7 and EPP 1.9. This feature allows you to select the version
of EPP that the parallel port should use.
Generally, EPP 1.9 is the preferred setting because it supports the newer EPP 1.9 devices and most EPP 1.7 devices; and offers
advantages like support for longer cables. However, because certain EPP 1.7 devices cannot work properly with an EPP 1.9 port, this
BIOS feature was implemented to allow you to set the EPP mode to EPP 1.7 when such an issue crops up.
For more information, check out KasperPedersen's explanation :-
In the EPP protocol, the port asserts a request strobe (I want to read/write). The attached device reads the data, and asserts an
acknowledge strobe (I have taken/provided the data). The port then negates the strobe (operation done). Finally the attached
device negates its acknowledgement (I'm ready for another operation). The difference between 1.7 and 1.9 is the last state where
the attached device removes the acknowledge strobe. 1.7 ports don't check that the device has negated the acknowledge strobe,
but presumes that the device will have removed it when 125ns have passed. This can be a problem if cables are long.
This was fixed in 1.9: Before it starts a cycle, it waits for the attached device to negate the acknowledge strobe from the last cycle.
This allows for a cleaner hardware design at the device end; and longer cables (50m possible if IEEE1284 is used, even though
that's outside the specs.) It sums down to that setting the port for 1.9 is compatible with previous 1.7 devices, but setting the port
for 1.7 will cause problems with 1.9 devices or long cables. The reason it's an option at all is that "some" 1.7 devices won't cope
with a new cycle less than 125 ns after the port has negated the request strobe. This is to be considered a hardware bug in the
device.
ISA 14.318mhz clock
The ISA bus only runs at a clock speed of 8.33MHz. Because each ISA data transfer takes anywhere from two to eight clock cycles
to complete, this yields a maximum bandwidth of only 4.77MB/s for 8-bit cards and 8.33MB/s for 16-bit cards. Maximum bandwidth
for the 8-bit ISA bus = 8.33MHz x 1 byte (8-bits) ÷ 2 clock cycles per transfer = 4.77MB/s Maximum bandwidth for the 16-bit ISA
bus = 8.33MHz x 2 bytes (16-bits) ÷ 2 clock cycles per transfer = 8.33MB/s
This BIOS feature allows you to overclock the ISA bus using the reference clock generator speed of 14.318MHz. This improves the
ISA bus bandwidth by 72%! 8-bit cards will thus have a bandwidth of 7.16MB/s while 16-bit cards will have a bandwidth of
14.32MB/s.
Naturally, it is recommended that you enable this feature to give the ISA bus a performance boost. Of course, this is only useful if
you have ISA devices in your system. Otherwise, this feature is redundant. Please note that while newer ISA cards are capable of
running at this 'out-of-spec' speed, older ones may not work properly at this speed. Therefore, if your ISA card fails to function
properly, disable this feature.
Master priority rotation
This feature controls the processor's access to the PCI bus. If you choose 1 PCI, the processor will always be granted access right
after the current PCI bus master transaction completes, irrespective of how many other PCI bus masters are on the queue. This
affords the quickest processor access to the PCI bus but it also means poorer performance for PCI devices.
If you choose 2 PCI, the processor will be granted access after the current and the next PCI transaction completes. In other words,
the processor is guaranteed access after two PCI bus master transactions, irrespective of how many other PCI bus masters are also
on the queue. This means the processor has to wait a little longer than with the 1 PCI option but PCI devices will have more access
to the PCI bus.
If you choose 3 PCI, the processor will only be granted access to the PCI bus after the current PCI bus master transaction and the
following two PCI bus master transactions on the queue have been completed. Therefore, the processor has to wait for three PCI
bus masters to complete their transactions on the PCI bus before it can gain access to the PCI bus itself. This means poorer
processor-to-PCI performance but PCI bus masters will enjoy better performance.
But no matter what you choose, the processor is guaranteed access to the PCI bus after a certain number of PCI bus master grants.
It doesn't matter if there are numerous PCI bus masters on the queue or when the processor requested access to the PCI bus. The
processor will always be granted access after one PCI bus master transaction (1 PCI), two transactions (2 PCI) or three transactions
(3 PCI).
For better overall performance, it is recommended that you select the 1 PCI option as this allows the processor to access the PCI
bus with minimal delay. However, if you wish to improve the performance of your PCI devices, you can try the 2 PCI or 3 PCI
options. They allocate more PCI bus resources to your PCI cards.
Onboard parallel port
This feature allows you to select the I/O address and IRQ for the onboard parallel port. The default I/O address of 378h and IRQ of
7 should work well in most cases. Unless you have a problem with the parallel port, you should leave it at the default settings.
Only select an alternative I/O address or IRQ if the parallel port settings are conflicting with other devices.
You can also disable the onboard parallel port if you do not need to use it. Doing so frees up the I/O port and IRQ used by
the parallel port. Those resources can then be reallocated for other devices to use.
Onboard serial port 1