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Tweaking Optimizing Windows.pdf - GEGeek

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CPU level 1 cache<br />

The modern processor is a very fast piece of silicon. Unfortunately, RAM development is so far behind that the processor would be<br />

fatally stalled by the slow memory accesses had it been forced to rely on current RAM technology alone. To alleviate this problem,<br />

designers have integrated a small amount of ultra-fast RAM within the processor core. This small amount of RAM is used to cache<br />

instructions and data for the processor's instantaneous access. Hence, it is known as the primary or level 1 or L1 cache. In current<br />

processor design, the L1 cache can range from 32K to 128KB in size.<br />

Only if the data required is not found in the L1 cache, is the processor required to retrieve it from the L2 cache or the RAM itself.<br />

When it does so, the processor incurs the penalties of accessing much slower memory. Fortunately, the L1 cache is often able to<br />

satisfy the processor's data requirements. In fact, it's so efficient that it makes the entire memory subsystem appear to be almost<br />

as fast as it is. This BIOS feature is used to enable or disable the processor's L1 cache. Naturally, the default and recommended<br />

setting is Enabled.<br />

This feature is useful for overclockers who want to pinpoint the cause of an unsuccessful overclocking attempt. For example, if your<br />

processor cannot reach 1GHz with the L1 cache enabled but can do so when the L1 cache's disabled; then the L1 cache is what's<br />

stopping the processor from running at 1GHz stably. But if the processor still can't reach 1GHz, then the problem lies elsewhere.<br />

However, disabling the L1 cache in order to increase the overclockability of the CPU is a very bad idea. The lack of L1 cache will<br />

cause the processor to stall because the memory subsystem won't be fast enough to continuously feed data to the processor.<br />

Therefore, except for troubleshooting purposes, this feature should be left enabled.<br />

CPU level 2 cache<br />

The modern processor is a very fast piece of silicon. Unfortunately, RAM development is so far behind that the processor would be<br />

fatally stalled by the slow memory accesses had it been forced to rely on current RAM technology alone. To alleviate this problem,<br />

designers have integrated a small amount of ultra-fast RAM within the processor core. This small amount of RAM is used to cache<br />

instructions and data for the processor's instantaneous access. Hence, it is known as the primary or level 1 or L1 cache. In current<br />

processor design, the L1 cache can range from 32K to 128KB in size.<br />

Only if the data required is not found in the L1 cache, is the processor required to retrieve it from the RAM itself. When it does so,<br />

the processor incurs the penalties of accessing much slower memory. Fortunately, the L1 cache is often able to satisfy the<br />

processor's data requirements. In fact, it's so efficient that it makes the entire memory subsystem appear to be almost as fast as it<br />

is.<br />

However, as the disparity between processor speed and RAM speed widens, the penalties incurred whenever there's a L1 cache miss<br />

becomes more significant. This is compounded by the fact that while the size of the L1 cache only doubled or quadrupled in recent<br />

years, the system will often have 16 times to 32 times more RAM! The small L1 cache size is inadequate in most cases and will not<br />

be able to satisfy many of the data requests. If the processor has to retrieve the data directly from the RAM, it will suffer a<br />

significant drop in performance.<br />

As such, designers often include a secondary or level 2 or L2 cache. This cache is designed to meet data requests that the L1 cache<br />

cannot satisfy. Although slower than the L1 cache, the L2 cache compensates by being much larger in size. This allows it to cache a<br />

lot more data compared to the L1 cache. As the two caches working together are able to satisfy over 95% of data reads, the need<br />

to access the much slower RAM is reduced to the minimum. This BIOS feature is used to enable or disable the processor's L2 cache.<br />

Naturally, the default and recommended setting is Enabled.<br />

This feature is useful for overclockers who want to pinpoint the cause of an unsuccessful overclocking attempt. For example, if your<br />

processor cannot reach 1GHz with the L2 cache enabled but can do so when the L2 cache's disabled; then the L2 cache is what's<br />

stopping the processor from running at 1GHz stably. But if the processor still can't reach 1GHz, then the problem lies elsewhere.<br />

However, disabling the L2 cache in order to increase the overclockability of the CPU is a very bad idea. The lack of L2 cache will<br />

cause the processor to stall because the memory subsystem won't be fast enough to continuously feed data to the processor.<br />

Therefore, except for troubleshooting purposes, this feature should be left enabled.<br />

Gate A20 option<br />

The A20 address line is a relic from the past. It came about because the father of x86 processors - the Intel 8088 only had 20<br />

address lines! That meant that it could only address 1MB of memory. When the Intel 80286 processor was introduced, it had 24<br />

address lines. To maintain 100% software compatibility with the 8088, the 80286 had a real mode that would truncate addresses to<br />

20-bits. Unfortunately, a design bug prevented it from truncating the addresses properly. This prevented the 80286 from running<br />

many 8088-compatible software.<br />

To solve this problem, IBM designed an AND gate switch to control the 20th address bit. This switch was henceforth known as the<br />

Gate A20. When enabled, all available address lines would be used by the processor for access to memory above the first<br />

megabyte. In the 8088-compatible real mode, the Gate A20 would be used to clear the 20th bit of all addresses. This allows the<br />

80286 to function like a superfast 8088 processor with access only to the first megabyte of memory. Even in modern systems,<br />

Gate A20 is still important. This is because the processor needs to turn A20 on and off in order to switch between real mode and<br />

protected mode. Since operating systems like Microsoft <strong>Windows</strong> 98 switch a lot between real mode and protected mode, relying on<br />

the understandably slow keyboard controller is no longer acceptable.<br />

The motherboard chipset's I/O port 0x92 (System Control Port A) was therefore recruited to take over the job. A lot faster than the<br />

keyboard controller, the 0x92 port allows the processor to switch much faster between real mode and protected mode. This<br />

translates into faster memory access and better system performance. This BIOS feature is used to determine the method by which<br />

Gate A20 is controlled. The Normal option forces the chipset to use the slow keyboard controller to do the switching. The Fast<br />

option, on the other hand, allows the chipset to use its own 0x92 port for faster switching. No candy for guessing which is the<br />

recommended setting!<br />

Please note this feature is only important for operating systems that switch a lot between real mode and protected mode. These<br />

operating systems include 16-bit operating systems like MS-DOS and 16-bit/32-bit hybrid operating systems like Microsoft <strong>Windows</strong><br />

98. This feature has no effect if the operating system only runs in real mode (no operating system currently in use does that, as far<br />

as I know) or if the operating system operates entirely in protected mode (i.e. Microsoft <strong>Windows</strong> XP). This is because if no A20

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