Tweaking Optimizing Windows.pdf - GEGeek

the bus recovery mechanism inserts 3.5 clock cycles between each consecutive 8-bit I/O cycle to the ISA bus. This feature enables
you to insert even more clock cycles between each consecutive 8-bit I/O cycle to the ISA bus. For example, if you choose 3 cycles,
the bus recovery mechanism inserts a total of 3.5 cycles + 3 cycles = 6.5 cycles between each consecutive 8-bit I/O cycle.
Choosing NA sets the number of delay cycles to the minimum 3.5 clock cycles.
Most 8-bit ISA cards will work fine with the minimum 3.5 delay cycles. However, some ISA cards may require additional delay
cycles. Keep increasing the number of additional delay cycles until the card works properly. You might also need to increase the
number of delay cycles if you are overclocking the PCI bus. But if possible, set the 8-bit I/O Recovery Time to NA for optimal ISA
bus performance. Increase the I/O Recovery Time only if you are having problems with your 8-bit ISA cards. Note that this feature
is only valid if you are using 8-bit ISA cards. It has no effect if there are no 8-bit ISA devices in the system.
Autodetect DIMM/PCI clk
When the motherboard's clock generator pulses, the extreme values (spikes) of the pulses creates EMI (Electromagnetic
Interference). This causes interference with other electronics in the area. To reduce this problem, the BIOS can either modulate the
pulses (to make them flatter) or turn off unused AGP, PCI or SDRAM clock signals. This feature is similar to the Smart Clock option
of the Spread Spectrum feature, which acts by the second method. If you enable it, the BIOS will monitor the AGP, PCI and SDRAM
DIMM slots. The clock signals of unoccupied slots are automatically turned off.. The clock signals to occupied AGP, PCI or SDRAM
slots will also be turned off whenever there's no activity.
Theoretically, EMI (Electromagnetic Interference) can be reduced this way without compromising system stability. This also allows
the computer to reduce power consumption because only components that are running will use power and then only when they are
actually doing work. The choice of whether to enable or disable this feature is really up to your personal preference. But since this
feature reduces EMI and power consumption without compromising system stability, it's recommended that you enable it.
Byte Merge
This BIOS feature is similar to the PCI Dynamic Bursting feature. If you have already read about the CPU to PCI Write Buffer
feature, you should know that the chipset has an integrated write buffer which allows the CPU to immediately write up to four words
of PCI writes to it, thus freeing it quickly and allowing it to work on other tasks. However, the CPU doesn't always write 32-bit data
to the PCI bus. 8-bit and 16-bit writes can also take place. But while the CPU may write 8-bits of data to the PCI bus, it is
considered as a single PCI transaction, equivalent to a 16-bit or 32-bit write. This reduces the effective PCI bandwidth, especially if
there are many 8-bit or 16-bit CPU-to-PCI writes.
To solve this problem, the write buffer can be programmed to accumulate and merge 8-bit and 16-bit writes into 32-bit writes. The
buffer then writes the merged data to the PCI bus. As you can see, merging the smaller 8-bit or 16-bit writes into a few large 32-bit
writes reduces the number of PCI transactions required. This increases the efficiency of the PCI bus and improves its bandwidth.
This feature controls the byte merging capability of the PCI write buffer. If it is enabled, every write transaction will go straight to
the write buffer. They are accumulated until enough data is available to be written to the PCI bus in a single burst. This improves
the PCI bus' performance so it's recommended that you enable this feature.
If you disable byte merging, all writes will still go to the PCI write buffer (if CPU to PCI Write Buffer has been enabled). But the
buffer won't accumulate and merge the data. The data is written to the PCI bus as soon as it is free. As such, there may be a loss of
PCI bus efficiency, particularly when 8-bit or 16-bit data is written to the bus. However, please note that Byte Merge may be
incompatible with certain PCI network interface cards (also known as NICs). Boar-Ral explains :-
I noticed that some PCI cards really despise Byte Merge, in particular the 3Com 3C905 series of NICs. While this may only apply to
certain motherboards, in my case the P3V4X, I feel that this is probably not the case and it is a rather widespread problem. Issues
I have encountered with Byte Merge enabled range from Windows 98 SE freezing at the boot screen to my NIC not functioning at
all. This issue has been confirmed with others using the same NIC and is what alerted me to the issue in the first place.
I wanted to confirm the observation posted by Boar-Ral concerning the "Byte Merge" BIOS setting. After enabling "Byte Merge" and
making other recommended BIOS setting changes, I suddenly lost all network I/O from my system. And yes, I happen to be using a
3Com 3C905B-TX NIC (with an Asus A7V motherboard). After a great deal of trial and error troubleshooting, I found that disabling
"Byte Merge" would let everything work again.
On the other hand, Cprall discovered that he was able to use the NIC in Windows 98 SE but not in Windows 2000. Check out what
he has to say :-
I'll even third this to say I was recently bitten by the same (A7V motherboard at BIOS 1009 and 3C905B-TX network card). I did
have one slight addition to what was seen here. With Byte Merge enabled, I was able to access the network under Windows 98 SE,
but not Windows 2000. With Byte Merge disabled, the network card works under both. In conclusion, if your NIC (Network
Interface Card) won't work properly, try disabling Byte Merge. That will take a bite out of the PCI bus' performance but that
can't be helped if you want the NIC to work. Other than this exception, you should enable Byte Merge for better performance.
CPU drive strength
The system controller has auto-compensation circuitry that compensates for impedance variations in motherboard designs. But since
the motherboard impedance is more or less fixed for each motherboard design, the manufacturer will sometimes determine the
optimal drive strength for that particular design and use it instead of relying on the auto-compensation circuitry. Either way, the
motherboard's impedance on the processor bus will be compensated for.
However, when the auto-compensation logic is bypassed and a fixed drive strength is used, the amount of impedance compensation
may not be sufficient sometimes. Hence the need for this BIOS feature. It allows you to manually set the processor bus drive
strength. The higher the value, the stronger the drive strength.
Due to the nature of this BIOS feature, it is possible to use it as an aid in overclocking the CPU. Your CPU may not overclock as well
as you wanted it to. But by raising the CPU Drive Strength, it is possible to improve its stability at overclocked speeds. So, try the
higher values of 2 or 3 if your CPU just won't go the extra mile.