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Radar System Engineering

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708 RADAR ltELA Y [SEC. 1743<br />

wave from the flopover is used to open the sine pulse switch for 25 ~sec<br />

or so at the expected time of arrival of the sine pulse. 1<br />

The delayed pulse reaches the far end of the delay line exactly at the<br />

middle of the switching wave. The remainder of the circuit is designed<br />

to force thk “comparison” pulse into time coincidence with the sine<br />

pulse by properly controlling the delay through adjustment of the output<br />

voltage. Various methods can be used to accomplish this adjustment.<br />

The operation of the method illustrated is described below. The<br />

comparison pulse triggers a flip-flop. The square waves from the two<br />

plates, one positive and one negative, are fed to the control grids of a pair<br />

of pentodes (Fig. 17. 13c), turning one on and the other off. The screen<br />

grids, normally at cathode potential, receive the positive sine pulse. If<br />

the pulse arrives when the control.grid of a given tube is on, that tube will<br />

produce a negative pulse on its plate. The signals are integrated in<br />

opposite polarity on condenser Cl by means of the diodes. A negative<br />

signal from Vj drives a negative charge through V3. to Cl. A signal from<br />

V, drives a negative charge to ground through VW The potential on C,<br />

is the output signal. It is returned (perhaps after amplification) to the<br />

comparison-pulse delay circuit which it controls. Thus, if the switching<br />

occurs before the arrival of the sine pulse, VI conducts, Cl becomes<br />

more positive, and the delay is increased. If the switching is too late, Vt<br />

conducts and the delay is decreased. The process continues on successive<br />

cycles until the delay is such that the sine pulse” straddles” the instant of<br />

switching. The delay circuit will then follow the variations in the delay<br />

of the sine pulse so that the output voltage varies in the desired manner.<br />

Figure 17.14 illustrates a system in which, although it is assumed that<br />

the modulator can be triggered, means are provided to distinguish<br />

between the cosine pulse and the modulator pulse for other reasons.<br />

The delay circuits in the synchronizer may be any of the varieties<br />

described in Sees. 13.7 and 13.12, the most precise and trouble-free<br />

results being obtained by the use of circuits similar to but not so refined<br />

as the circuit shown in Fig. 13.36. If this type is used, the sine or cosine<br />

voltage is used to bias the cathode of the diode, and the bias of the anode<br />

is adjusted to give the desired delay A at zero scanner angle. The value<br />

of B is determined jointly by the slope of the sawtooth and the amplitude<br />

of the sine and cosine voltages from the scanner.<br />

The basic pulse, sine pulse, and cosine pulse are passed to the usual<br />

three-pulse coder along with the modulator trigger signal, which is derived<br />

from a fixed-delay circuit triggered by the cosine pulse. In order that the<br />

trigger signal shall be properly timed when decoded at the receiver, the<br />

1 Since this interval is too narrow to allow rapid “looking in” initially or after<br />

tracking has been lost, the circuits are arranged in a mamcr not shown so that in the<br />

abaence of pulses the grid remaine on.

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