Copyright by William Lloyd Bircher 2010 - The Laboratory for ...

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5.3 Complete-System Desktop Power Model In this section results for the application of the trickle-down modeling approach are presented for a recent desktop platform. This platform differs from the previous server in terms of process technology, system architecture, manufacturer and workload among others. It is shown that though this platform is significantly different than the server, the trickle-down modeling approach still accurately models power. Of particular importance are two major differences: subsystem level power management and workload characteristics. Power management increases the complexity and utility of the power model as power consumption varies greatly with the application of power management. Compare this to the server system in which power remains near a constant level due to subsystems not reducing performance capacity, and therefore power consumption, during periods of low utilization. Increased power variation is also attributable to desktop- specific workloads. While server workloads tend to always operate at full speed (e.g. SPEC CPU) desktop workloads such as SYSmark and 3DMark contain large portions of low utilization. This exposes the impact of power management and the need to model it. 5.3.1 System Description To validate the effectiveness of the trickle-down approach the process is applied to a recent desktop platform. A comparison of the two systems used in this study (server and desktop) is provided in Table 5.3. These systems differ in their power management implementations and subsystem components. The desktop system is optimized for power 84
efficiency rather than performance. This leads to greater variation in power consumption compared to a server since power management features reduce power greatly during low utilization. Server systems tend to employ less aggressive power savings. Therefore, power at low utilization is greater and overall variation is lesser. This difference is evident in the analysis of average subsystem-level power in Tables 5.1 - 5.2 and 5.6. The power management implementation in the desktop system also requires the use of more extensive power models. Rather than only needing to consider CPU clock gating and DRAM power down modes, the desktop system model must consider DVFS, chipset link power management, disk and GPU power management. The wider range of power consumption also leads to greater temperature sensitivity. Table 5.3 System Comparison Platform Segment Server Desktop Manufacturer Intel AMD Processor(s) Quad-socket 130nM 2.8GHz Dual-core 45nM 2.0GHz Memory 8GB DDR-200 4GB DDR3-1066 Power CPU Clock Gating CPU Clock Gating and DVFS Management DRAM Power Down DRAM Power Down and Self Refresh Chipset Link Disconnect Harddrive Spin Down and ATA modes GPU Clock Gating Graphics Rage ProXL RS780 Observable CPU CPU Subsystems Chipset Chipset Memory Memory I/O Memory Controller Disk 85 GPU Disk
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Copyright by William Lloyd Bircher
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Predictive Power Management for Mul
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Acknowledgements I would like to th
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Predictive Power Management for Mul
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Table of Contents Chapter 1 Introdu
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5.3.6 Memory ......................
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List of Tables Table 1.1 Windows Vi
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List of Figures Figure 1.1 CPU Core
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Chapter 1 Introduction Computing sy
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increases the overhead of adaptatio
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suboptimal from a power and perform
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Active Core Activity Idle except fo
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4. Design a predictive power manage
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1.7 Organization This dissertation
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Chapter 2 Methodology The developme
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2.1.2 Subsystem-Level Power in a Se
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The main components are subsystem p
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Table 2.4 Laptop System Description
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2.3 Performance Counter Sampling To
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instruction streams that exercise a
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the power trace to the PMC trace co
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The first bar in Figure 3.1 “Fetc
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Table 3.4 Instruction Linear Regres
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long time to complete, more aggress
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First, prediction accuracy is consi
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coverage of 43% and accuracy over 9
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which corresponds to the DVFS sched
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Table 7.6: SYSmark 2007 Power and P
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In this case the predictor achieves
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2007 power consumption contains man
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Chapter 8 Related Research This sec
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8.2 System-Level Power Characteriza
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prediction scheme in this dissertat
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Chapter 9 Conclusions and Future Wo
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the duration of power and performan
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execution, portions of pipelines or
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[BiJo06-1] W. L. Bircher and L. Joh
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the 2005 ACM SIGMETRICS Internation
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[HaKe07] H. Hanson, S.W. Keckler, K
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[JoMa01] R. Joseph and M. Martonosi
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[LiBr05] Y. Li, D. Brooks, Z. Hu, a
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[Os06] Open Source Development Lab,
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[WaCh08] X. Wang and M. Chen. Clust
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[PiSh01] P. Pillai and K. G. Shin.
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Copyright by William Lloyd Bircher 2010 - The Laboratory for ...

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