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Copyright by William Lloyd Bircher 2010 - The Laboratory for ...

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execution, portions of pipelines or functional units can be effectively resized through<br />

clock gating and power gating when not needed. <strong>The</strong> challenge is to apply these power<br />

saving adaptations only when the transition cost can be amortized <strong>by</strong> long idle phases.<br />

By defining prediction metrics <strong>for</strong> each functional unit, it is possible to detect and predict<br />

the critical long-duration idle phases.<br />

Process-Level Power Accounting<br />

<strong>The</strong> entirety of this dissertation and other per<strong>for</strong>mance-counter power modeling research<br />

focuses on attributing power to a particular hardware thread or core. <strong>The</strong> limitation of<br />

this approach is that process scheduling and migration can impact the ability to discern<br />

unique program phases. It is likely that tracking power and phase history at the process-<br />

level will reduce aliasing thus improving predictability.<br />

Scheduling using On-line Power and Per<strong>for</strong>mance Models<br />

Another application of power accounting is <strong>for</strong> the direction of scheduling decisions. By<br />

introducing per<strong>for</strong>mance models that are power-aware, optimal scheduling and power<br />

management decisions can be made. <strong>The</strong> current state-of-the-art architectural power<br />

adaptations provide a range of throughput and latency at the processor core-level.<br />

Expressing those impacts as run-time power and per<strong>for</strong>mance models would allow major<br />

improvements in energy efficiency and per<strong>for</strong>mance.<br />

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