Copyright by William Lloyd Bircher 2010 - The Laboratory for ...
Copyright by William Lloyd Bircher 2010 - The Laboratory for ...
Copyright by William Lloyd Bircher 2010 - The Laboratory for ...
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average distribution. <strong>The</strong> apparent increased residency <strong>for</strong> longer phases is specific to the<br />
high CoV cases. <strong>The</strong> reason is that <strong>by</strong> including a larger number of samples (longer<br />
phase length) in the CoV calculation and using a high CoV threshold, the “real” phase<br />
behavior is obscured. Actual phase edges get averaged out <strong>by</strong> the larger number of<br />
samples. This is primary reasons <strong>for</strong> choosing CoV=0.05 <strong>for</strong> the subsequent analysis. It<br />
exhibits the desired behavior of distinguishing the long and short phases. For the<br />
following discussion, a CoV of 0.05 is utilized.<br />
Probability<br />
0.6<br />
0.5<br />
0.4<br />
0.3<br />
0.2<br />
0.1<br />
0.0<br />
Disk<br />
Chipset<br />
Memory<br />
10 20 30<br />
Watts<br />
40 50<br />
Figure 4.7 Subsystem Amplitude Distributions<br />
<strong>The</strong> effect of narrow chipset and memory distributions is evident in their high rates of<br />
classification. For both, at least half of all samples can be classified as 1000 ms phases.<br />
In contrast, CPU, I/O and disk have no 1000 ms phases and considerably fewer phases<br />
classified at finer granularities. <strong>The</strong>se results can be used to plan power management<br />
strategies <strong>for</strong> a particular workload. For example, <strong>by</strong> noting that the I/O subsystem has<br />
almost no phases longer than 1 ms, the designer would be required to use low latency<br />
57<br />
CPU<br />
Subsystem Total Power %<br />
Disk 13%<br />
Chipset 15%<br />
Memory 20%<br />
CPU 28%<br />
I/O 24%<br />
I/O