Copyright by William Lloyd Bircher 2010 - The Laboratory for ...

Watts
5
4
3
2
1
0
Figure 5.7 GPU Power Model (Non-Gated Clocks) – 3DMark06-HDR1
5.3.6 Memory
clock gating
Memory or DRAM power consumption is one of the more variable subsystems. Similar
to the CPU, the application of various power management features yields a wide range of
power consumption. For example consider the standard deviation of power consumption
in SPECjbb of 1.096W compared to average its average of 1.71W. This variation is
caused by the three modes of operation: self-refresh, precharge power down and active.
Self-refresh represents the lowest power state in which DRAM contents are maintained
by on-chip refresh logic. This mode has a high entry/exit latency and is only entered
when the system is expected to be idle for a long period. The memory controller selects
this mode as part of its hardware-controlled C1e idle [Bk09] state. Since this state is
entered in conjunction with the hypertransport link disconnect, the power savings can be
represented using the LinkActive% metric. Pre-charge power down is a higher-power,
lower-latency alternative which provides power savings for short idle phases. This
allows pre-charge power savings to be considered with normal DRAM activity power.
96
Measured
Modeled
Error
0 20 40 60 80
Seconds
100%
50%
0%
-50%
Error(%)
-100%