Copyright by William Lloyd Bircher 2010 - The Laboratory for ...
Copyright by William Lloyd Bircher 2010 - The Laboratory for ...
Copyright by William Lloyd Bircher 2010 - The Laboratory for ...
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existing power adaptation algorithms. Since current implementations only consider idle<br />
time rather than memory-boundedness, the benefit of p-states is underutilized.<br />
Additionally, the effect of adjusting operating system p-state transition parameters is<br />
shown in Table 6.2. Columns Fast and Fast-Perf represent cases in which p-state<br />
transitions occur at the fastest rate and bias towards per<strong>for</strong>mance respectively. Since<br />
existing operating systems such as Microsoft Windows XP and Linux bias p-state<br />
transitions toward per<strong>for</strong>mance, these results can be considered representative <strong>for</strong> those<br />
cases.<br />
6.3 Summary<br />
In this section, a power and per<strong>for</strong>mance analysis of dynamic power adaptations is<br />
presented <strong>for</strong> a Quad-Core AMD processor. Per<strong>for</strong>mance and power are shown to be<br />
greatly affected <strong>by</strong> direct and indirect characteristics. Direct effects are composed of<br />
operating system thread and frequency scheduling. Slow transitions <strong>by</strong> the operating<br />
system between idle and active operation cause significant per<strong>for</strong>mance loss. <strong>The</strong> effect<br />
is greater <strong>for</strong> compute-bound workloads which would otherwise be unaffected <strong>by</strong> power<br />
adaptations. Slow active-to-idle transitions also cause reduced power savings. Indirect<br />
effects due to shared, power-managed resources such as caches can greatly reduce<br />
per<strong>for</strong>mance if idle core frequency reductions are not limited sufficiently. <strong>The</strong>se effects<br />
are more pronounced in memory-bound workloads since per<strong>for</strong>mance is directly related<br />
to accessing shared resources between the active and idle cores. Finally, it is shown that<br />
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