Copyright by William Lloyd Bircher 2010 - The Laboratory for ...

1 data cache access rate dominates cache-dependent power consumption. No other single
cache access metric correlates as well to processor core power (including caches).
%Halted/%Not-Halted – Percent time processor is in halted state. This represents
power saved due to explicit clock gating. The processor saves power using fine-grain
and coarse-grain of clock gating. Fine-grain clock gating saves power in unutilized
portions of the processor while instructions are in-flight. Coarse-grain clock gating can
save more power than fine-grain yet it requires the processor to be completely idle. The
processor applies this type of gating only when the processor is guaranteed to not have
any instructions in-flight. This condition by definition occurs following execution of the
HLT instruction. Halt residency is controlled by the operating system and interrupts
scheduling work on processors.
CPU Clock Frequency – Core clocks per second. Due to the use of DVFS, it is
necessary to track the instantaneous frequency of the processor. Though some metrics
such as µops fetched or retired implicitly track the power consumed in many components
due to clock frequency, they do not track workload-independent power consumers such
as clock grids. Using clock frequency in conjunction with %Halt it is possible to account
for power consumed in these units.
CPU Voltage – CPU Voltage Rail. Due to the application of DVFS the processor may
operate at a range of discrete voltages in order to save power. Changes in voltage have a
significant impact on power consumption due to the exponential relationship between
89