Copyright by William Lloyd Bircher 2010 - The Laboratory for ...
Copyright by William Lloyd Bircher 2010 - The Laboratory for ...
Copyright by William Lloyd Bircher 2010 - The Laboratory for ...
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demonstrate a correlation between observable per<strong>for</strong>mance events and power<br />
consumption. He shows that a correlation exists <strong>for</strong>: µops/sec, fµops/sec, L2<br />
accesses/sec and memory accesses/sec. Since only synthetic workloads are characterized,<br />
these results are not representative of realistic workloads. <strong>The</strong> most closely related work<br />
is <strong>by</strong> Isci et al [IsMa03]. <strong>The</strong>y build a comprehensive power model based on utilization<br />
factors of the various components of the processor. Using 22 per<strong>for</strong>mance monitoring<br />
counters they model average power consumption of SPEC2000 workloads within 5%.<br />
<strong>The</strong> models in this dissertation yields similar accuracy, yet with only two PMC metrics<br />
that aggregate power consumption across the numerous processor functional units. A<br />
major limitation of all of these contemporary works is the lack of awareness of power<br />
management and temperature effects. <strong>The</strong> dissertation models accurately account <strong>for</strong><br />
power fluctuations due to clock gating, DVFS and temperature variation.<br />
Existing studies in system-level power modeling [Ja01] [ZeSo03] [KiSu06] have relied<br />
on events local to the subsystem. <strong>The</strong> model in this dissertation is the first to encompass<br />
complete system power using only events local to the processor. <strong>The</strong> most closely<br />
related work <strong>by</strong> Heath [GuSi02], models CPU, network and disk power using operating<br />
system counters. This model does not account <strong>for</strong> memory and chipset power. Since it<br />
relies on comparatively high-overhead operating system routines, the run-time<br />
per<strong>for</strong>mance cost is higher compared to the dissertation model that uses only fast, on-chip<br />
per<strong>for</strong>mance counters.<br />
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