Copyright by William Lloyd Bircher 2010 - The Laboratory for ...
Copyright by William Lloyd Bircher 2010 - The Laboratory for ...
Copyright by William Lloyd Bircher 2010 - The Laboratory for ...
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activity levels to 30%. Since processors have a finite number of architected DVFS states,<br />
the algorithm selects the nearest frequency which meets the target activity level.<br />
Core Activity Level<br />
100%<br />
90%<br />
80%<br />
70%<br />
60%<br />
50%<br />
40%<br />
30%<br />
20%<br />
10%<br />
0%<br />
=<br />
Increase<br />
Frequency<br />
Increase Threshold = 50%<br />
No Change<br />
Decrease Threshold = 30%<br />
Decrease<br />
Frequency<br />
126<br />
<br />
+ <br />
Figure 7.2: Windows Vista Reactive P-State Selection Algorithm<br />
7.3 Workload Characterization<br />
High Per<strong>for</strong>mance<br />
Demand<br />
Region<br />
Hysteresis<br />
Region<br />
Low Per<strong>for</strong>mance<br />
Demand<br />
Region<br />
To analyze the power/per<strong>for</strong>mance impact of the predictive power management scheme<br />
on real-world workloads, a system running the desktop/client SYSmark 2007 benchmark<br />
is characterized. This benchmark represents a wide range of desktop computing<br />
applications. <strong>The</strong> benchmark components are E-Learning, Video Creation, Productivity,<br />
and 3D. <strong>The</strong> individual subtests are listed in Table 7.1. This benchmark is particularly<br />
important to the study of dynamic power adaptations since it provides realistic user<br />
scenarios that include user interface and I/O delays. <strong>The</strong>se delays cause a large amount