Copyright by William Lloyd Bircher 2010 - The Laboratory for ...

While this model is accurate for most current generation processors, future processors
may require additional metrics to maintain comparable accuracy. Power savings
techniques such as power gating and on-die voltage regulation will require new methods
for power accounting. These techniques extend the sensitivity of leakage power
consumption to functional unit activity levels. Currently, leakage power is dictated
almost completely by architecturally visible, core-level, idle and DVFS states. Future
power gating implementations will likely be applied within subsets of a core, such as
floating point units or caches. Similarly, on-die regulation allows DVFS to be applied
independently to particular functional units. This increases the complexity of
performance counter power modeling which normally only accounts for switching power.
To accounting for these local power adaptations, models will need either detailed
knowledge of the power gating and DVFS implementations or statistical characterizations
of their application. Given the effectiveness of performance counter power models at
accounting for fine-grain switching power, it is likely that power gating and on-die
regulation can also be accounted for.
5.3.5 GPU
To estimate GPU power consumption a technique similar to that typically used for CPUs
is employed: count the number of ungated clocks. In CPUs this is done by subtracting
the number of halted clocks from all clocks [BiJo06-1]. In the case of the RS780 the
ungated clocks can be measured directly. This approach only accounts directly for power
saved due to clock gating. Power reductions due to DVFS are not explicitly represented.
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