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Quartus II Settings File Reference Manual - Altera

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8–64 Chapter 8: EDA Netlist Writer Assignments<br />

EDA_WRITE_DEVICE_CONTROL_PORTS<br />

EDA_WRITE_DEVICE_CONTROL_PORTS<br />

Type<br />

Adds the devpor, devclrn, and devoe signals in the design as input ports in the toplevel<br />

design hierarchy in the Verilog or VHDL simulation netlist for the project.<br />

Boolean<br />

Device Support<br />

This setting can be used in projects targeting any <strong>Altera</strong> device family.<br />

Notes<br />

This assignment is included in the Fitter report.<br />

Syntax<br />

set_global_assignment -name EDA_WRITE_DEVICE_CONTROL_PORTS -section_id<br />

<br />

set_global_assignment -name EDA_WRITE_DEVICE_CONTROL_PORTS -entity -section_id <br />

Default Value<br />

Off, requires section identifier<br />

<strong>Quartus</strong> <strong>Settings</strong> <strong>File</strong> June 2012 <strong>Altera</strong> Corporation<br />

<strong>Reference</strong> <strong>Manual</strong>

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