Quartus II Settings File Reference Manual - Altera

FAST_INPUT_REGISTER
Type
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Quartus Settings File
Reference Manual
June 2012
2. Pin & Locations Assignments
Implements an input register in a cell that has a fast, direct connection from an I/O
pin. If such a fast, direct connection from the I/O pin is not available on the I/O cell
hardware, this option instructs the Fitter to lock the input register in the logic array
black (LAB) adjacent to the I/O cell feeding it. Turning on the Fast Input Register
option can help maximize I/O timing performance, for example, by permitting fast
setup times. Turning this option off for a particular signal prevents the Fitter from
implementing the signal automatically in an I/O cell or locking down the input
register in the LAB adjacent to the I/O cell. This option is ignored if it is applied to
anything other than a register or an input or bidirectional pin that feeds a register.
Boolean
Device Support
This setting can be used in projects targeting the following device families:
■ Arria GX
■ Arria II GX
■ Arria II GZ
■ Arria V
■ Cyclone
■ Cyclone II
■ Cyclone III
■ Cyclone III LS
■ Cyclone IV E
■ Cyclone IV GX
■ Cyclone V
■ HardCopy II
■ HardCopy III
■ HardCopy IV
■ MAX II
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