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Quartus II Settings File Reference Manual - Altera

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4–98 Chapter 4: Analysis & Synthesis Assignments<br />

INFER_RAMS_FROM_RAW_LOGIC<br />

INFER_RAMS_FROM_RAW_LOGIC<br />

Type<br />

Instructs the Compiler to infer RAM from registers and multiplexers. Some HDL<br />

patterns that differ from <strong>Altera</strong> RAM templates are initially converted into logic.<br />

However, these structures function as RAM and, because of that, the Compiler may<br />

create an altsyncram megafunction instance for them at a later stage when this<br />

assignment is on. With this assignment on, the Compiler may use more device RAM<br />

resources and less LABs.<br />

This option can be used as a project-wide option, or assigned to a design entity.<br />

This option is turned on by default.<br />

Boolean<br />

Device Support<br />

This setting can be used in projects targeting any <strong>Altera</strong> device family.<br />

Notes<br />

This assignment is included in the Analysis & Synthesis report.<br />

Syntax<br />

set_global_assignment -name INFER_RAMS_FROM_RAW_LOGIC <br />

set_global_assignment -name INFER_RAMS_FROM_RAW_LOGIC -entity <br />

set_instance_assignment -name INFER_RAMS_FROM_RAW_LOGIC -to -entity<br />

<br />

Example<br />

set_global_assignment -name infer_rams_from_raw_logic off<br />

set_instance_assignment -name infer_rams_from_raw_logic off -to foo<br />

Default Value<br />

On<br />

<strong>Quartus</strong> <strong>Settings</strong> <strong>File</strong> June 2012 <strong>Altera</strong> Corporation<br />

<strong>Reference</strong> <strong>Manual</strong>

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