Quartus II Settings File Reference Manual - Altera

6–70 Chapter 6: Fitter Assignments
DDIO_INPUT_REGISTER
DDIO_INPUT_REGISTER
Type
Directs the Compiler to perform special placement and routing of the specified
register to prevent register packing of the input registers into the IO registers. This is
used for registers involved in DDR memory interfaces. A setting of High designates
the input register that gets set on the rising edge of the clock; a setting of Low
designates the input register that gets set on the falling edge of the clock.
Enumeration
■ High
■ Low
■ Off
Device Support
This setting can be used in projects targeting the following device families:
■ Cyclone
■ Cyclone II
■ Cyclone III
■ Cyclone III LS
■ Cyclone IV E
■ Cyclone IV GX
Notes
This assignment supports wildcards.
Syntax
set_instance_assignment -name DDIO_INPUT_REGISTER -to -entity
Quartus Settings File June 2012 Altera Corporation
Reference Manual