Quartus II Settings File Reference Manual - Altera

4–170 Chapter 4: Analysis & Synthesis Assignments
SYNCHRONIZATION_REGISTER_CHAIN_LENGTH
SYNCHRONIZATION_REGISTER_CHAIN_LENGTH
Type
This setting specifies the maximum number of registers in a row to be considered as a
synchronization chain. Synchronization chains are sequences of registers with the
same clock, no fanout in between, such that the first register is fed by a pin, or by logic
in another clock domain. These registers are considered for metastability analysis
(available for some families), and are also protected from optimizations such as
retiming. When gate-level retiming is turned on, these registers are not moved. The
default length is set to two.
Integer
Device Support
This setting can be used in projects targeting the following device families:
■ Arria GX
■ Arria II GX
■ Arria II GZ
■ Arria V
■ Cyclone
■ Cyclone II
■ Cyclone III
■ Cyclone III LS
■ Cyclone IV E
■ Cyclone IV GX
■ Cyclone V
■ HardCopy II
■ HardCopy III
■ HardCopy IV
■ MAX II
■ MAX V
■ Stratix
■ Stratix GX
■ Stratix II
■ Stratix II GX
■ Stratix III
■ Stratix IV
■ Stratix V
Quartus Settings File June 2012 Altera Corporation
Reference Manual