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Quartus II Settings File Reference Manual - Altera

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6–274 Chapter 6: Fitter Assignments<br />

PROGRAMMABLE_POWER_TECHNOLOGY_SETTING<br />

PROGRAMMABLE_POWER_TECHNOLOGY_SETTING<br />

Type<br />

Controls how the Fitter configures tiles to operate in high-speed mode or low-power<br />

mode. Automatic specifies that the Fitter should try to minimize power without<br />

sacrificing timing performance. Minimize Power Only specifies that the Fitter should<br />

set the maximum number of tiles to operate in low-power mode. Force All Tiles with<br />

Failing Timing Paths to High Speed specifies that the Fitter should ensure that all<br />

paths that are failing timing are set to high-speed mode. For designs that meet timing,<br />

the behavior of this setting should be similar to the Automatic setting. For designs<br />

that fail timing, all paths with negative slack is put in high-speed mode. This does not<br />

likely increase the speed of the design. Although it may increase static power<br />

consumption, it may assist in determining which logic paths need to be re-designed in<br />

order to close timing.<br />

Enumeration<br />

■ Automatic<br />

Device Support<br />

■ Force All Tiles with Failing Timing Paths to High Speed<br />

■ Minimize Power Only<br />

This setting can be used in projects targeting the following device families:<br />

■ Arria <strong>II</strong> GZ<br />

■ Stratix <strong>II</strong>I<br />

■ Stratix IV<br />

■ Stratix V<br />

Notes<br />

This assignment is included in the Fitter report.<br />

Syntax<br />

set_global_assignment -name PROGRAMMABLE_POWER_TECHNOLOGY_SETTING <br />

Default Value<br />

Force All Tiles with Failing Timing Paths to High Speed<br />

<strong>Quartus</strong> <strong>Settings</strong> <strong>File</strong> June 2012 <strong>Altera</strong> Corporation<br />

<strong>Reference</strong> <strong>Manual</strong>

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