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Quartus II Settings File Reference Manual - Altera

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Chapter 4: Analysis & Synthesis Assignments 4–15<br />

ALLOW_SYNCH_CTRL_USAGE<br />

ALLOW_SYNCH_CTRL_USAGE<br />

Type<br />

Allows the Compiler to utilize synchronous clear and/or synchronous load signals in<br />

normal mode logic cells. Turning on this option helps to reduce the total number of<br />

logic cells used in the design, but might negatively impact the fitting since<br />

synchronous control signals are shared by all the logic cells in a LAB.<br />

This option is useful for finding areas of the design that can be implemented more<br />

efficiently with synchronous clear and/or synchronous load signals in normal mode<br />

logic cells, and as a result, minimize the number of logic cells used in the design.<br />

This option is turned on by default.<br />

Boolean<br />

Device Support<br />

This setting can be used in projects targeting the following device families:<br />

■ Arria GX<br />

■ Arria <strong>II</strong> GX<br />

■ Arria <strong>II</strong> GZ<br />

■ Arria V<br />

■ Cyclone<br />

■ Cyclone <strong>II</strong><br />

■ Cyclone <strong>II</strong>I<br />

■ Cyclone <strong>II</strong>I LS<br />

■ Cyclone IV E<br />

■ Cyclone IV GX<br />

■ Cyclone V<br />

■ HardCopy <strong>II</strong><br />

■ HardCopy <strong>II</strong>I<br />

■ HardCopy IV<br />

■ MAX <strong>II</strong><br />

■ MAX V<br />

■ Stratix<br />

■ Stratix GX<br />

■ Stratix <strong>II</strong><br />

■ Stratix <strong>II</strong> GX<br />

■ Stratix <strong>II</strong>I<br />

■ Stratix IV<br />

June 2012 <strong>Altera</strong> Corporation <strong>Quartus</strong> <strong>Settings</strong> <strong>File</strong><br />

<strong>Reference</strong> <strong>Manual</strong>

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