Quartus II Settings File Reference Manual - Altera

2–16 Chapter 2: Pin & Locations Assignments
VIRTUAL_PIN
VIRTUAL_PIN
Type
Specifies whether an I/O element in a lower-level design entity can be temporarily
mapped to a logic element and not to a pin during compilation. The virtual pin is then
implemented as a LUT. This option should be specified only for I/O elements that
become nodes when imported to the top-level design.
Boolean
Device Support
This setting can be used in projects targeting the following device families:
■ Arria GX
■ Arria II GX
■ Arria II GZ
■ Arria V
■ Cyclone
■ Cyclone II
■ Cyclone III
■ Cyclone III LS
■ Cyclone IV E
■ Cyclone IV GX
■ Cyclone V
■ HardCopy II
■ HardCopy III
■ HardCopy IV
■ MAX II
■ MAX V
■ Stratix
■ Stratix GX
■ Stratix II
■ Stratix II GX
■ Stratix III
■ Stratix IV
■ Stratix V
Notes
This assignment supports wildcards.
Quartus Settings File June 2012 Altera Corporation
Reference Manual