Quartus II Settings File Reference Manual - Altera

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x Contents MAX7000B_VCCIO_IOBANK1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–192 MAX7000B_VCCIO_IOBANK2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–193 MAX7000_DEVICE_IO_STANDARD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–194 MAX7000_ENABLE_JTAG_BST_SUPPORT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–195 MAX7000_INDIVIDUAL_TURBO_BIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–196 MAX_CLOCKS_ALLOWED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–197 MAX_CONSECUTIVE_OUTPUTS_FOR_ELECTROMIGRATION . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–198 MAX_CONSECUTIVE_VIO_OUTPUTS_FOR_ELECTROMIGRATION . . . . . . . . . . . . . . . . . . . . . . . 6–199 MAX_CURRENT_FOR_ELECTROMIGRATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–200 MAX_CURRENT_FOR_VIO_ELECTROMIGRATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–201 MAX_GLOBAL_CLOCKS_ALLOWED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–202 MAX_PERIPHERY_CLOCKS_ALLOWED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–203 MAX_REGIONAL_CLOCKS_ALLOWED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–204 MEMORY_INTERFACE_DATA_PIN_GROUP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–205 MEM_INTERFACE_DELAY_CHAIN_CONFIG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–206 MERGE_TX_PLL_DRIVEN_BY_REGISTERS_WITH_SAME_CLEAR . . . . . . . . . . . . . . . . . . . . . . . . . 6–207 MIGRATION_CONSTRAIN_CORE_RESOURCES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–208 MIGRATION_DEVICES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–209 NCEO_OPEN_DRAIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–210 NDQS_LOCAL_CLOCK_DELAY_CHAIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–211 OPTIMIZE_FOR_METASTABILITY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–212 OPTIMIZE_HOLD_TIMING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–213 OPTIMIZE_IOC_REGISTER_PLACEMENT_FOR_TIMING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–215 OPTIMIZE_MULTI_CORNER_TIMING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–216 OPTIMIZE_POWER_DURING_FITTING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–218 OPTIMIZE_SSN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–220 OPTIMIZE_TIMING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–222 OUTPUT_BUFFER_DELAY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–224 OUTPUT_BUFFER_DELAY_CONTROL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–225 OUTPUT_ENABLE_DELAY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–227 OUTPUT_ENABLE_GROUP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–228 OUTPUT_PIN_LOAD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–230 OUTPUT_TERMINATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–231 OVERRIDE_DEFAULT_ELECTROMIGRATION_PARAMETERS . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–232 PAD_TO_CORE_DELAY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–233 PAD_TO_DDIO_REGISTER_DELAY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–234 PAD_TO_INPUT_REGISTER_DELAY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–235 PCI_IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–236 PHYSICAL_SYNTHESIS_ASYNCHRONOUS_SIGNAL_PIPELINING . . . . . . . . . . . . . . . . . . . . . . . 6–238 PHYSICAL_SYNTHESIS_COMBO_LOGIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–240 PHYSICAL_SYNTHESIS_COMBO_LOGIC_FOR_AREA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–242 PHYSICAL_SYNTHESIS_EFFORT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–244 PHYSICAL_SYNTHESIS_LOG_FILE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–246 PHYSICAL_SYNTHESIS_MAP_LOGIC_TO_MEMORY_FOR_AREA . . . . . . . . . . . . . . . . . . . . . . . . 6–247 PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–248 PHYSICAL_SYNTHESIS_REGISTER_RETIMING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–250 PLACEMENT_EFFORT_MULTIPLIER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–252 PLL_AUTO_RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–254 PLL_BANDWIDTH_PRESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–255 PLL_CHANNEL_SPACING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–256 PLL_COMPENSATE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–257 PLL_COMPENSATION_MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–259 PLL_ENFORCE_USER_PHASE_SHIFT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–261 PLL_FEEDBACK_CLOCK_SIGNAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–262 Quartus Settings File June 2012 Altera Corporation Reference Manual
Contents xi PLL_FORCE_OUTPUT_COUNTER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–263 PLL_FORCE_OUTPUT_COUNTER_HARDCOPY_REPLAY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–265 PLL_IGNORE_MIGRATION_DEVICES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–266 PLL_OPTIMIZE_PHASE_SHIFT_FOR_TIMING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–267 PLL_OUTPUT_CLOCK_FREQUENCY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–268 PLL_PFD_CLOCK_FREQUENCY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–269 PLL_TYPE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–270 PLL_VCO_CLOCK_FREQUENCY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–271 PRESERVE_PLL_COUNTER_ORDER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–272 PROGRAMMABLE_POWER_MAXIMUM_HIGH_SPEED_ FRACTION_OF_USED_LAB_TILES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–273 PROGRAMMABLE_POWER_TECHNOLOGY_SETTING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–274 PROGRAMMABLE_PREEMPHASIS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–275 PROGRAMMABLE_VOD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–277 PR_DONE_OPEN_DRAIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–279 PR_ERROR_OPEN_DRAIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–280 PR_READY_OPEN_DRAIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–281 QDR_D_PIN_GROUP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–282 RESERVE_ALL_UNUSED_PINS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–283 RESERVE_ALL_UNUSED_PINS_WEAK_PULLUP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–284 RESERVE_ASDO_AFTER_CONFIGURATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–285 RESERVE_DATA0_AFTER_CONFIGURATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–286 RESERVE_DATA15_THROUGH_DATA8_AFTER_CONFIGURATION . . . . . . . . . . . . . . . . . . . . . . 6–288 RESERVE_DATA1_AFTER_CONFIGURATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–289 RESERVE_DATA31_THROUGH_DATA16_AFTER_CONFIGURATION . . . . . . . . . . . . . . . . . . . . . 6–290 RESERVE_DATA7_THROUGH_DATA1_AFTER_CONFIGURATION . . . . . . . . . . . . . . . . . . . . . . . 6–291 RESERVE_DATA7_THROUGH_DATA2_AFTER_CONFIGURATION . . . . . . . . . . . . . . . . . . . . . . . 6–293 RESERVE_DATA7_THROUGH_DATA5_AFTER_CONFIGURATION . . . . . . . . . . . . . . . . . . . . . . . 6–294 RESERVE_DCLK_AFTER_CONFIGURATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–295 RESERVE_FLASH_NCE_AFTER_CONFIGURATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–296 RESERVE_NWS_NRS_NCS_CS_AFTER_CONFIGURATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–297 RESERVE_OTHER_AP_PINS_AFTER_CONFIGURATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–298 RESERVE_RDYNBUSY_AFTER_CONFIGURATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–299 ROUTER_CLOCKING_TOPOLOGY_ANALYSIS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–300 ROUTER_EFFORT_MULTIPLIER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–301 ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–303 ROUTER_REGISTER_DUPLICATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–305 ROUTER_TIMING_OPTIMIZATION_LEVEL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–307 ROUTING_BACK_ANNOTATION_MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–309 SCE_PIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–310 SDO_PIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–311 SEED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–312 SLEW_RATE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–313 SLOW_SLEW_RATE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–315 STRATIXGX_ALLOW_CLOCK_FANOUT_WITH_ANALOG_RESET . . . . . . . . . . . . . . . . . . . . . . . . 6–317 STRATIXGX_ALLOW_GIGE_IN_DOUBLE_DATA_WIDTH_MODE . . . . . . . . . . . . . . . . . . . . . . . . 6–318 STRATIXGX_ALLOW_GIGE_UNDER_FULL_DATARATE_RANGE . . . . . . . . . . . . . . . . . . . . . . . . 6–319 STRATIXGX_ALLOW_GIGE_WITHOUT_8B10B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–320 STRATIXGX_ALLOW_GIGE_WITH_CORECLK_SELECTED_AT_RATE_MATCHER . . . . . . . . . . 6–321 STRATIXGX_ALLOW_GIGE_WITH_RX_CORECLK_FROM_NON_TXPLL_SOURCE . . . . . . . . . 6–322 STRATIXGX_ALLOW_PARALLEL_LOOPBACK_IN_DOUBLE_DATA_WIDTH_MODE . . . . . . . 6–323 STRATIXGX_ALLOW_POST8B10B_LOOPBACK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–324 STRATIXGX_ALLOW_REVERSE_PARALLEL_LOOPBACK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–325 STRATIXGX_ALLOW_RX_CORECLK_FROM_NON_RX_CLKOUT_ June 2012 Altera Corporation Quartus Settings File Reference Manual
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Revision History © 2012 Altera Cor
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Appendix : About-3 Assignment Value
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Appendix : About-5 Overview Overvie
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