ts_125331v120300p

3GPP TS 25.331 version 12.3.0 Release 12
1639
ETSI TS 125 331 V12.3.0 (2014-10)
}
HS-DSCH-SPS-NewOperation-TDD128 ::= SEQUENCE {
hs-dsch-TbsList HS-DSCH-TbsList-TDD128 OPTIONAL,
hs-dsch-RxPatternList HS-DSCH-RxPatternList-TDD128 OPTIONAL,
hARQInfoForSPS SEQUENCE {
numberOfProcesses INTEGER (1..8),
memorySize
HARQMemorySize
} OPTIONAL,
hs-sich-List
HS-SICH-List-TDD128,
initialSPSInfoForHSDSCH SEQUENCE {
timeslotInfo BIT STRING (SIZE (5)),
codeResourceInfo
HS-ChannelisationCodeSetInfo-LCR,
activationTime
ActivationTime,
sfnNum INTEGER (0..1),
initialRxPatternIndex
INTEGER (0..maxRxPatternForHSDSCH-TDD128-1),
initialTfsIndex
INTEGER (0..maxTbsForHSDSCH-TDD128-1),
modulation ENUMERATED { modQPSK, mod16QAM },
hs-sich-Index
INTEGER (0..maxHSSICH-TDD128-1)
} OPTIONAL
}
HS-PDSCH-Midamble-Configuration-TDD128 ::= SEQUENCE {
midambleAllocationMode
CHOICE{
defaultMidamble
NULL,
commonMidamble
NULL,
ueSpecificMidamble INTEGER (0..15)
},
-- Actual value midambleConfiguration = IE value * 2
midambleConfiguration INTEGER (1..8)
}
HS-SCCH-Info ::= SEQUENCE {
modeSpecificInfo CHOICE {
fdd SEQUENCE {
hS-SCCHChannelisationCodeInfo SEQUENCE (SIZE (1..maxHSSCCHs)) OF
HS-SCCH-Codes,
dl-ScramblingCode SecondaryScramblingCode OPTIONAL
},
tdd CHOICE {
tdd384 SEQUENCE {
nack-ack-power-offset INTEGER (-7..8),
hs-SICH-PowerControl-Info
HS-SICH-Power-Control-Info-TDD384,
hS-SCCH-SetConfiguration
SEQUENCE (SIZE (1..maxHSSCCHs)) OF
}
}
}
},
tdd128
HS-SCCH-TDD384
SEQUENCE (SIZE (1..maxHSSCCHs)) OF
HS-SCCH-TDD128
HS-SCCH-Info-r6 ::= SEQUENCE {
modeSpecificInfo CHOICE {
fdd SEQUENCE {
hS-SCCHChannelisationCodeInfo SEQUENCE (SIZE (1..maxHSSCCHs)) OF
HS-SCCH-Codes,
dl-ScramblingCode SecondaryScramblingCode OPTIONAL
},
tdd CHOICE {
tdd384 SEQUENCE {
nack-ack-power-offset INTEGER (-7..8),
hs-SICH-PowerControl-Info
HS-SICH-Power-Control-Info-TDD384,
dhs-sync DHS-Sync OPTIONAL,
}
}
bler-target
hS-SCCH-SetConfiguration
Bler-Target,
SEQUENCE (SIZE (1..maxHSSCCHs)) OF
HS-SCCH-TDD384-r6
},
tdd128 SEQUENCE {
nack-ack-power-offset INTEGER (-7..8),
power-level-HSSICH INTEGER (-120..-58),
tpc-step-size ENUMERATED { s1, s2, s3 , spare1 },
}
bler-target
hS-SCCH-SetConfiguration
Bler-Target,
SEQUENCE (SIZE (1..maxHSSCCHs)) OF
HS-SCCH-TDD128-r6
ETSI