- Page 1 and 2:
80C186EB/80C188EBMicroprocessorUser
- Page 3 and 4:
Information in this document is pro
- Page 5 and 6:
CONTENTS2.3.2 Software Interrupts .
- Page 7 and 8:
CONTENTS6.4.4 Enabling and Disablin
- Page 9 and 10:
CONTENTS10.2.2 Asynchronous Mode Pr
- Page 11 and 12:
CONTENTSFIGURESFigurePage2-1 Simpli
- Page 13 and 14:
CONTENTSFIGURESFigurePage6-9 Using
- Page 15 and 16:
CONTENTSTableTABLESPage1-1 Comparis
- Page 17 and 18:
CONTENTSEXAMPLESExamplePage5-1 Init
- Page 20 and 21:
CHAPTER 1INTRODUCTIONThe 8086 micro
- Page 22 and 23:
INTRODUCTIONEach chapter covers a s
- Page 24 and 25:
INTRODUCTION1.3.1 How to Use Intel'
- Page 26:
Overview of the80C186 FamilyArchite
- Page 29 and 30:
OVERVIEW OF THE 80C186 FAMILY ARCHI
- Page 31 and 32:
OVERVIEW OF THE 80C186 FAMILY ARCHI
- Page 33 and 34:
OVERVIEW OF THE 80C186 FAMILY ARCHI
- Page 35 and 36:
OVERVIEW OF THE 80C186 FAMILY ARCHI
- Page 37 and 38:
OVERVIEW OF THE 80C186 FAMILY ARCHI
- Page 39:
OVERVIEW OF THE 80C186 FAMILY ARCHI
- Page 42 and 43:
OVERVIEW OF THE 80C186 FAMILY ARCHI
- Page 44 and 45:
OVERVIEW OF THE 80C186 FAMILY ARCHI
- Page 46 and 47:
OVERVIEW OF THE 80C186 FAMILY ARCHI
- Page 48 and 49:
OVERVIEW OF THE 80C186 FAMILY ARCHI
- Page 50 and 51:
OVERVIEW OF THE 80C186 FAMILY ARCHI
- Page 52 and 53:
OVERVIEW OF THE 80C186 FAMILY ARCHI
- Page 54 and 55:
OVERVIEW OF THE 80C186 FAMILY ARCHI
- Page 56 and 57:
OVERVIEW OF THE 80C186 FAMILY ARCHI
- Page 58 and 59:
OVERVIEW OF THE 80C186 FAMILY ARCHI
- Page 60 and 61:
OVERVIEW OF THE 80C186 FAMILY ARCHI
- Page 62 and 63:
OVERVIEW OF THE 80C186 FAMILY ARCHI
- Page 64 and 65:
OVERVIEW OF THE 80C186 FAMILY ARCHI
- Page 66 and 67:
OVERVIEW OF THE 80C186 FAMILY ARCHI
- Page 68 and 69:
OVERVIEW OF THE 80C186 FAMILY ARCHI
- Page 70 and 71:
OVERVIEW OF THE 80C186 FAMILY ARCHI
- Page 72 and 73:
OVERVIEW OF THE 80C186 FAMILY ARCHI
- Page 74 and 75: OVERVIEW OF THE 80C186 FAMILY ARCHI
- Page 76 and 77: OVERVIEW OF THE 80C186 FAMILY ARCHI
- Page 78: Bus Interface Unit3
- Page 81 and 82: BUS INTERFACE UNITPhysical Implemen
- Page 83 and 84: BUS INTERFACE UNIT(X + 1)(X)A19:1 D
- Page 85 and 86: BUS INTERFACE UNITFor word transfer
- Page 87 and 88: BUS INTERFACE UNITCLKOUTT4 T1 T2 T3
- Page 89 and 90: BUS INTERFACE UNITCLKOUTT4or TI T1
- Page 91 and 92: BUS INTERFACE UNITSignals From CPU4
- Page 93 and 94: BUS INTERFACE UNITT2T3or TWT4or TIC
- Page 95 and 96: BUS INTERFACE UNITA normally not-re
- Page 97 and 98: BUS INTERFACE UNITT2or T3or TWT3or
- Page 99 and 100: BUS INTERFACE UNITAn idle bus state
- Page 101 and 102: BUS INTERFACE UNIT3.5.1.1 Refresh B
- Page 103 and 104: BUS INTERFACE UNITMost memory and p
- Page 105 and 106: BUS INTERFACE UNITCLKOUTT4 T2 T3 TI
- Page 107 and 108: BUS INTERFACE UNIT3.5.4 HALT Bus Cy
- Page 109 and 110: BUS INTERFACE UNITCLKOUTT1 TI TIALE
- Page 111 and 112: BUS INTERFACE UNITCLKOUTALES2:0AD15
- Page 113 and 114: BUS INTERFACE UNITCLKOUTNMI/INTxNot
- Page 115 and 116: BUS INTERFACE UNITALEProcessorA19:1
- Page 117 and 118: BUS INTERFACE UNITThe WAIT instruct
- Page 119 and 120: BUS INTERFACE UNITCLKOUTHOLD124HLDA
- Page 121 and 122: BUS INTERFACE UNITCLKOUT1 3 4HOLDHL
- Page 123 and 124: BUS INTERFACE UNITCLKOUTHOLD12345HL
- Page 128 and 129: CHAPTER 4PERIPHERAL CONTROL BLOCKAl
- Page 130 and 131: PERIPHERAL CONTROL BLOCKTable 4-1.
- Page 132 and 133: PERIPHERAL CONTROL BLOCK4.4.3 F-Bus
- Page 134 and 135: PERIPHERAL CONTROL BLOCKAs an examp
- Page 136: Clock Generation andPower Managemen
- Page 139 and 140: CLOCK GENERATION AND POWER MANAGEME
- Page 141 and 142: CLOCK GENERATION AND POWER MANAGEME
- Page 143 and 144: CLOCK GENERATION AND POWER MANAGEME
- Page 145 and 146: CLOCK GENERATION AND POWER MANAGEME
- Page 147 and 148: CLOCK GENERATION AND POWER MANAGEME
- Page 149 and 150: CLOCK GENERATION AND POWER MANAGEME
- Page 151 and 152: CLOCK GENERATION AND POWER MANAGEME
- Page 153 and 154: CLOCK GENERATION AND POWER MANAGEME
- Page 155 and 156: CLOCK GENERATION AND POWER MANAGEME
- Page 157 and 158: CLOCK GENERATION AND POWER MANAGEME
- Page 160 and 161: CHAPTER 6CHIP-SELECT UNITEvery syst
- Page 162 and 163: CHIP-SELECT UNITStopValueIgnore Sto
- Page 164 and 165: CHIP-SELECT UNITAddress1ReadyFlashD
- Page 166 and 167: CHIP-SELECT UNITRegister Name:Regis
- Page 168 and 169: CHIP-SELECT UNITRegister Name:Regis
- Page 170 and 171: CHIP-SELECT UNITIn the previous equ
- Page 172 and 173: CHIP-SELECT UNITNoAnyREADY = 1WaitM
- Page 174 and 175: CHIP-SELECT UNITThe GCS chip-select
- Page 176 and 177:
CHIP-SELECT UNIT$ TITLE (Chip-Selec
- Page 178 and 179:
CHIP-SELECT UNIT;SET UP CHIP SELECT
- Page 180:
Refresh Control Unit7
- Page 183 and 184:
REFRESH CONTROL UNIT7.1 THE ROLE OF
- Page 185 and 186:
REFRESH CONTROL UNITThe BIU does no
- Page 187 and 188:
REFRESH CONTROL UNITCLKOUTT4 T1 T2
- Page 189 and 190:
REFRESH CONTROL UNITRegister Name:R
- Page 191 and 192:
REFRESH CONTROL UNITRegister Name:R
- Page 193 and 194:
REFRESH CONTROL UNIT$mod186nameexam
- Page 195 and 196:
REFRESH CONTROL UNITT1 T1 T1 T1 T1
- Page 198 and 199:
CHAPTER 8INTERRUPT CONTROL UNITThe
- Page 200 and 201:
INTERRUPT CONTROL UNITThe Interrupt
- Page 202 and 203:
INTERRUPT CONTROL UNIT8.2.1 Typical
- Page 204 and 205:
INTERRUPT CONTROL UNIT8.2.2.2 Inter
- Page 206 and 207:
INTERRUPT CONTROL UNIT8.2.4 Interru
- Page 208 and 209:
INTERRUPT CONTROL UNITInterrupt pre
- Page 210 and 211:
INTERRUPT CONTROL UNITRegister Name
- Page 212 and 213:
INTERRUPT CONTROL UNITRegister Name
- Page 214 and 215:
INTERRUPT CONTROL UNIT8.3.3 Interru
- Page 216 and 217:
INTERRUPT CONTROL UNITRegister Name
- Page 218 and 219:
INTERRUPT CONTROL UNITRegister Name
- Page 220 and 221:
INTERRUPT CONTROL UNITRegister Name
- Page 222:
Timer/Counter Unit9
- Page 225 and 226:
TIMER/COUNTER UNITT0 InT1 InTransit
- Page 227 and 228:
TIMER/COUNTER UNITStartTimerEnabled
- Page 229 and 230:
TIMER/COUNTER UNITWhen configured f
- Page 231 and 232:
TIMER/COUNTER UNITRegister Name:Reg
- Page 233 and 234:
TIMER/COUNTER UNITRegister Name:Reg
- Page 235 and 236:
TIMER/COUNTER UNIT9.2.2 Clock Sourc
- Page 237 and 238:
TIMER/COUNTER UNITTable 9-2. Timer
- Page 239 and 240:
TIMER/COUNTER UNITThe input pins fo
- Page 241 and 242:
TIMER/COUNTER UNIT$mod186name examp
- Page 243 and 244:
TIMER/COUNTER UNITsti;enable interr
- Page 245 and 246:
TIMER/COUNTER UNITpop dx ;restore s
- Page 247 and 248:
TIMER/COUNTER UNIT9-24
- Page 250 and 251:
CHAPTER 10SERIAL COMMUNICATIONS UNI
- Page 252 and 253:
SERIAL COMMUNICATIONS UNITReception
- Page 254 and 255:
SERIAL COMMUNICATIONS UNITSxTBUFFro
- Page 256 and 257:
SERIAL COMMUNICATIONS UNITTXD/RXD1
- Page 258 and 259:
SERIAL COMMUNICATIONS UNIT10.2 PROG
- Page 260 and 261:
SERIAL COMMUNICATIONS UNITRegister
- Page 262 and 263:
SERIAL COMMUNICATIONS UNITDue to in
- Page 264 and 265:
SERIAL COMMUNICATIONS UNITRegister
- Page 266 and 267:
SERIAL COMMUNICATIONS UNITRegister
- Page 268 and 269:
SERIAL COMMUNICATIONS UNITThe CPU s
- Page 270 and 271:
SERIAL COMMUNICATIONS UNIT10.3.3.2
- Page 272 and 273:
SERIAL COMMUNICATIONS UNIT10.5 SERI
- Page 274 and 275:
SERIAL COMMUNICATIONS UNITmov dx, S
- Page 276 and 277:
SERIAL COMMUNICATIONS UNITmov dx, P
- Page 278 and 279:
SERIAL COMMUNICATIONS UNIT$mod186na
- Page 280 and 281:
SERIAL COMMUNICATIONS UNITmov dx, S
- Page 282 and 283:
SERIAL COMMUNICATIONS UNITDisconnec
- Page 284 and 285:
SERIAL COMMUNICATIONS UNIT$mod186na
- Page 286:
Input/Output Ports11
- Page 289 and 290:
INPUT/OUTPUT PORTSFrom IntegratedPe
- Page 291 and 292:
INPUT/OUTPUT PORTSFrom IntegratedPe
- Page 293 and 294:
INPUT/OUTPUT PORTSFrom PortDirectio
- Page 295 and 296:
INPUT/OUTPUT PORTS11.2.1 Port Contr
- Page 297 and 298:
INPUT/OUTPUT PORTSRegister Name:Reg
- Page 299 and 300:
INPUT/OUTPUT PORTS11.3 PROGRAMMING
- Page 302 and 303:
CHAPTER 12MATH COPROCESSINGThe 80C1
- Page 304 and 305:
MATH COPROCESSING12.3.1.1 Data Tran
- Page 306 and 307:
MATH COPROCESSING12.3.1.3 Compariso
- Page 308 and 309:
MATH COPROCESSING12.3.2 80C187 Data
- Page 310 and 311:
MATH COPROCESSINGExternalOscillator
- Page 312 and 313:
MATH COPROCESSINGBus cycles involvi
- Page 314 and 315:
MATH COPROCESSING12.4.4 Exception T
- Page 316 and 317:
MATH COPROCESSING$mod186name exampl
- Page 318:
ONCE Mode13
- Page 321 and 322:
ONCE MODE13-2
- Page 324 and 325:
APPENDIX A80C186 INSTRUCTION SETADD
- Page 326 and 327:
80C186 INSTRUCTION SET ADDITIONS AN
- Page 328 and 329:
80C186 INSTRUCTION SET ADDITIONS AN
- Page 330 and 331:
80C186 INSTRUCTION SET ADDITIONS AN
- Page 332 and 333:
80C186 INSTRUCTION SET ADDITIONS AN
- Page 334:
InputSynchronizationB
- Page 337 and 338:
INPUT SYNCHRONIZATIONA synchronizat
- Page 340 and 341:
APPENDIX CINSTRUCTION SET DESCRIPTI
- Page 342 and 343:
INSTRUCTION SET DESCRIPTIONSTable C
- Page 344 and 345:
INSTRUCTION SET DESCRIPTIONSTable C
- Page 346 and 347:
INSTRUCTION SET DESCRIPTIONSTable C
- Page 348 and 349:
INSTRUCTION SET DESCRIPTIONSTable C
- Page 350 and 351:
INSTRUCTION SET DESCRIPTIONSTable C
- Page 352 and 353:
INSTRUCTION SET DESCRIPTIONSTable C
- Page 354 and 355:
INSTRUCTION SET DESCRIPTIONSTable C
- Page 356 and 357:
INSTRUCTION SET DESCRIPTIONSTable C
- Page 358 and 359:
INSTRUCTION SET DESCRIPTIONSTable C
- Page 360 and 361:
INSTRUCTION SET DESCRIPTIONSTable C
- Page 362 and 363:
INSTRUCTION SET DESCRIPTIONSTable C
- Page 364 and 365:
INSTRUCTION SET DESCRIPTIONSTable C
- Page 366 and 367:
INSTRUCTION SET DESCRIPTIONSTable C
- Page 368 and 369:
INSTRUCTION SET DESCRIPTIONSTable C
- Page 370 and 371:
INSTRUCTION SET DESCRIPTIONSNEGNOPN
- Page 372 and 373:
INSTRUCTION SET DESCRIPTIONSTable C
- Page 374 and 375:
INSTRUCTION SET DESCRIPTIONSTable C
- Page 376 and 377:
INSTRUCTION SET DESCRIPTIONSTable C
- Page 378 and 379:
INSTRUCTION SET DESCRIPTIONSTable C
- Page 380 and 381:
INSTRUCTION SET DESCRIPTIONSTable C
- Page 382 and 383:
INSTRUCTION SET DESCRIPTIONSSHRSTCS
- Page 384 and 385:
INSTRUCTION SET DESCRIPTIONSTable C
- Page 386 and 387:
INSTRUCTION SET DESCRIPTIONSTable C
- Page 388:
Instruction SetOpcodes and ClockCyc
- Page 391 and 392:
INSTRUCTION SET OPCODES AND CLOCK C
- Page 393 and 394:
INSTRUCTION SET OPCODES AND CLOCK C
- Page 395 and 396:
INSTRUCTION SET OPCODES AND CLOCK C
- Page 397 and 398:
INSTRUCTION SET OPCODES AND CLOCK C
- Page 399 and 400:
INSTRUCTION SET OPCODES AND CLOCK C
- Page 401 and 402:
INSTRUCTION SET OPCODES AND CLOCK C
- Page 403 and 404:
INSTRUCTION SET OPCODES AND CLOCK C
- Page 405 and 406:
INSTRUCTION SET OPCODES AND CLOCK C
- Page 407 and 408:
INSTRUCTION SET OPCODES AND CLOCK C
- Page 409 and 410:
INSTRUCTION SET OPCODES AND CLOCK C
- Page 411 and 412:
INSTRUCTION SET OPCODES AND CLOCK C
- Page 414 and 415:
INDEX80C187 Math Coprocessor, 12-2-
- Page 416 and 417:
INDEXData transfers, 3-1-3-6instruc
- Page 418 and 419:
INDEXlogical, 2-10, 2-12offset valu
- Page 420 and 421:
INDEXSHR instruction, A-9SI registe