80C186EB/80C188EB Microprocessor User's Manual - CEUNES

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INSTRUCTION SET DESCRIPTIONSTable C-4. Instruction Set (Continued)Name Description OperationFlagsAffectedCWDDAADASNOTE:Convert Word to Doubleword:CWDExtends the sign of the word in registerAX throughout register DX. Use toproduce a double-length (doubleword)dividend from a word prior toperforming word division.Instruction Operands:noneDecimal Adjust for Addition:DAACorrects the result of previouslyadding two valid packed decimaloperands (the destination operandmust have been register AL). Changesthe content of AL to a pair of validpacked decimal digits.Instruction Operands:noneDecimal Adjust for Subtraction:DASCorrects the result of a previoussubtraction of two valid packeddecimal operands (the destinationoperand must have been specified asregister AL). Changes the content ofAL to a pair of valid packed decimaldigits.Instruction Operands:noneif(AX) < 8000Hthen(DX) ← 0else(DX) ← FFFFHif((AL) and 0FH) > 9 or (AF) = 1then(AL) ← (AL) + 6(AF) ← 1if(AL) > 9FH or (CF) = 1then(AL) ← (AL) + 60H(CF) ← 1if((AL) and 0FH) > 9 or (AF) = 1then(AL) ← (AL) – 6(AF) ← 1if(AL) > 9FH or (CF) = 1then(AL) ← (AL) – 60H(CF) ← 1The three symbols used in the Flags Affected column are defined as follows:– the contents of the flag remain unchanged after the instruction is executed? the contents of the flag is undefined after the instruction is executedüthe flag is updated after the instruction is executedAF –CF –DF –IF –OF –PF –SF –TF –ZF –AF üCF üDF –IF –OF ?PF üSF üTF –ZF üAF üCF üDF –IF –OF ?PF üSF üTF –ZF üC-11
INSTRUCTION SET DESCRIPTIONSTable C-4. Instruction Set (Continued)Name Description OperationDECNOTE:Decrement:DEC destSubtracts one from the destinationoperand. The operand may be a byteor a word and is treated as anunsigned binary number (see AAA andDAA).Instruction Operands:DEC regDEC mem(dest) ← (dest) – 1The three symbols used in the Flags Affected column are defined as follows:– the contents of the flag remain unchanged after the instruction is executed? the contents of the flag is undefined after the instruction is executedüthe flag is updated after the instruction is executedFlagsAffectedAF üCF –DF –IF –OF üPF üSF üTF –ZF üC-12
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80C186EB/80C188EBMicroprocessorUser
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Information in this document is pro
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CONTENTS2.3.2 Software Interrupts .
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CONTENTS6.4.4 Enabling and Disablin
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CONTENTS10.2.2 Asynchronous Mode Pr
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CONTENTSFIGURESFigurePage2-1 Simpli
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CONTENTSFIGURESFigurePage6-9 Using
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CONTENTSTableTABLESPage1-1 Comparis
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CONTENTSEXAMPLESExamplePage5-1 Init
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CHAPTER 1INTRODUCTIONThe 8086 micro
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INTRODUCTIONEach chapter covers a s
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INTRODUCTION1.3.1 How to Use Intel'
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Overview of the80C186 FamilyArchite
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OVERVIEW OF THE 80C186 FAMILY ARCHI
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Bus Interface Unit3
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BUS INTERFACE UNITPhysical Implemen
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BUS INTERFACE UNIT(X + 1)(X)A19:1 D
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BUS INTERFACE UNITFor word transfer
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BUS INTERFACE UNITCLKOUTT4 T1 T2 T3
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BUS INTERFACE UNITCLKOUTT4or TI T1
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BUS INTERFACE UNITSignals From CPU4
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BUS INTERFACE UNITT2T3or TWT4or TIC
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BUS INTERFACE UNITA normally not-re
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BUS INTERFACE UNITT2or T3or TWT3or
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BUS INTERFACE UNITAn idle bus state
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BUS INTERFACE UNIT3.5.1.1 Refresh B
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BUS INTERFACE UNITMost memory and p
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BUS INTERFACE UNITCLKOUTT4 T2 T3 TI
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BUS INTERFACE UNIT3.5.4 HALT Bus Cy
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BUS INTERFACE UNITCLKOUTT1 TI TIALE
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BUS INTERFACE UNITCLKOUTALES2:0AD15
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BUS INTERFACE UNITCLKOUTNMI/INTxNot
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BUS INTERFACE UNITALEProcessorA19:1
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BUS INTERFACE UNITThe WAIT instruct
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BUS INTERFACE UNITCLKOUTHOLD124HLDA
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BUS INTERFACE UNITCLKOUT1 3 4HOLDHL
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BUS INTERFACE UNITCLKOUTHOLD12345HL
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Peripheral ControlBlock4
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PERIPHERAL CONTROL BLOCKRegister Na
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PERIPHERAL CONTROL BLOCK4.3 RESERVE
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PERIPHERAL CONTROL BLOCK4.4.3.1 Wri
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PERIPHERAL CONTROL BLOCK4-8
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CHAPTER 5CLOCK GENERATION AND POWER
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CLOCK GENERATION AND POWER MANAGEME
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Chip-Select Unit6
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CHIP-SELECT UNIT27C25674AC138A1:13A
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CHIP-SELECT UNITT4 T1 T2 T3T4CLKOUT
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CHIP-SELECT UNITThe START register
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CHIP-SELECT UNITRegister Name:Regis
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CHIP-SELECT UNIT6.4.2 Start Address
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CHIP-SELECT UNITBUS READYREADY Cont
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CHIP-SELECT UNITTable 6-3 lists exa
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CHIP-SELECT UNITREADYALEA19:16AD15:
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CHIP-SELECT UNITDRAM_BASEEQU 128 ;W
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CHIP-SELECT UNIT; DATA SEGMENTDATAS
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CHAPTER 7REFRESH CONTROL UNITThe Re
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REFRESH CONTROL UNITRefresh Control
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REFRESH CONTROL UNIT7.5 REFRESH BUS
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REFRESH CONTROL UNIT7.7 PROGRAMMING
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REFRESH CONTROL UNITRegister Name:R
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REFRESH CONTROL UNITRegister Name:R
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REFRESH CONTROL UNITmov dx, RFBASEm
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Interrupt ControlUnit8
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INTERRUPT CONTROL UNITTimer 0 Timer
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INTERRUPT CONTROL UNITInterrupt sou
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INTERRUPT CONTROL UNIT8.2.2.1 Prior
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INTERRUPT CONTROL UNITINTINT08259Ao
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INTERRUPT CONTROL UNIT8.2.6 Edge an
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INTERRUPT CONTROL UNITTable 8-3. In
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INTERRUPT CONTROL UNIT.Register Nam
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INTERRUPT CONTROL UNIT8.3.2 Interru
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INTERRUPT CONTROL UNIT8.3.4 Priorit
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INTERRUPT CONTROL UNITReading the P
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INTERRUPT CONTROL UNITRegister Name
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INTERRUPT CONTROL UNIT3. Program th
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CHAPTER 9TIMER/COUNTER UNITThe Time
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TIMER/COUNTER UNITTimer 0 Timer 1 T
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TIMER/COUNTER UNITContinued From"A"
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TIMER/COUNTER UNITRegister Name:Reg
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TIMER/COUNTER UNITThe timer countin
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TIMER/COUNTER UNITTimer 0Serviced1I
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TIMER/COUNTER UNIT9.3.2 Synchroniza
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TIMER/COUNTER UNITlib_80186 segment
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TIMER/COUNTER UNIT$mod186nameexampl
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TIMER/COUNTER UNIT_CMPB equ word pt
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SerialCommunicationsUnit10
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SERIAL COMMUNICATIONS UNIT1 2 3 4 5
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SERIAL COMMUNICATIONS UNITThe RX ma
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SERIAL COMMUNICATIONS UNITThe Trans
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SERIAL COMMUNICATIONS UNIT5. At the
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SERIAL COMMUNICATIONS UNITRegister
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SERIAL COMMUNICATIONS UNITRegister
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SERIAL COMMUNICATIONS UNIT3. If the
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SERIAL COMMUNICATIONS UNITThe seria
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SERIAL COMMUNICATIONS UNIT10.2.3 Pr
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SERIAL COMMUNICATIONS UNITBCLK is a
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SERIAL COMMUNICATIONS UNITChannel_0
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SERIAL COMMUNICATIONS UNITmovmovmov
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SERIAL COMMUNICATIONS UNIT10.5.2 Mo
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SERIAL COMMUNICATIONS UNITMASTER186
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SERIAL COMMUNICATIONS UNIT$mod186na
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SERIAL COMMUNICATIONS UNIT$mod186na
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SERIAL COMMUNICATIONS UNITcmp al, F
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SERIAL COMMUNICATIONS UNIT10-36
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CHAPTER 11INPUT/OUTPUT PORTSMany ap
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INPUT/OUTPUT PORTS11.1.2 Input Port
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INPUT/OUTPUT PORTSFrom IntegratedPe
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INPUT/OUTPUT PORTS11.1.5.1 Port 1 O
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INPUT/OUTPUT PORTSRegister Name:Reg
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INPUT/OUTPUT PORTSRegister Name:Reg
Page 300: Math Coprocessing12
Page 303 and 304: MATH COPROCESSING12.3 THE 80C187 MA
Page 305 and 306: MATH COPROCESSINGAvailable data typ
Page 307 and 308: MATH COPROCESSING12.3.1.5 Constant
Page 309 and 310: MATH COPROCESSINGIncreasing Signifi
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Page 313 and 314: MATH COPROCESSINGExternalOscillator
Page 315 and 316: MATH COPROCESSING80C186Modular Core
Page 317 and 318: MATH COPROCESSING$mod186$modc187nam
Page 320 and 321: CHAPTER 13ONCE MODEONCE (pronounced
Page 322: 80C186 InstructionSet Additions and
Page 325 and 326: 80C186 INSTRUCTION SET ADDITIONS AN
Page 336 and 337: APPENDIX BINPUT SYNCHRONIZATIONMany
Page 338: Instruction SetDescriptionsC
Page 341 and 342: INSTRUCTION SET DESCRIPTIONSTable C
Page 349: INSTRUCTION SET DESCRIPTIONSTable C
Page 357 and 358: INSTRUCTION SET DESCRIPTIONSINCINST
Page 371 and 372: INSTRUCTION SET DESCRIPTIONSOROUTTa
Page 387 and 388: INSTRUCTION SET DESCRIPTIONSC-48
Page 390 and 391: APPENDIX DINSTRUCTION SET OPCODESAN
Page 392 and 393: INSTRUCTION SET OPCODES AND CLOCK C
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INSTRUCTION SET OPCODES AND CLOCK C
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Index
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INDEXand T-states, 3-9data phase, 3
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INDEXarithmetic instructions, 2-19-
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INDEXblock diagram, 3-15implementat
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INDEXWWait statesand bus cycles, 3-
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80C186EB/80C188EB Microprocessor User's Manual - CEUNES

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