80C186EB/80C188EB Microprocessor User's Manual - CEUNES

INPUT/OUTPUT PORTSRegister Name:Register Mnemonic:Register Function:Port Direction RegisterPxDIR (P1DIR, P2DIR)Controls the direction of pins programmed as I/Oports.15 0PD7PD6PD5PD4PD3PD2PD1PD0A1313-0ABitMnemonicBit NameResetStateFunctionPD7:0PortDirection 7:0FFHSetting the PD bit for a pin programmed as ageneral-purpose I/O port selects the pin as aninput. Clearing the PD bit selects the pin as anoutput.NOTE: Reserved register bits are shown with gray shading. Reserved bits must be writtento a logic zero to ensure compatibility with future Intel products.Figure 11-6. Port Direction Register (PxDIR)11.2.3 Port Data Latch RegisterThe Port Data Latch Register (Figure 11-7) holds the value to be driven on an output or bidirectionalpin. This value appears at the pin only if it is programmed as a port.The Port Data Latch Register is read/write. Reading a Port Data Latch Register returns the valueof the latch itself and not that of the associated port pin.11-9