80C186EB/80C188EB Microprocessor User's Manual - CEUNES

INTERRUPT CONTROL UNITReading the Poll register (Figure 8-11) acknowledges the pending interrupt, just as if the CPUhad started the interrupt vectoring sequence. The Interrupt Control Unit updates the Interrupt Request,In-Service, Poll, and Poll Status registers, as it does in the normal interrupt acknowledgesequence. However, the processor does not run an interrupt acknowledge sequence or fetch thevector from the vector table. Instead, software must read the interrupt type and execute the properroutine to service the pending interrupt.Reading the Poll Status register (Figure 8-12) will merely transmit the status of the polling bitswithout modifying any of the other Interrupt Controller registers.Register Name:Register Mnemonic:Register Function:Poll RegisterPOLLRead to check for and acknowledge pendinginterrupts when polling15 0IREQVT4VT3VT2VT1VT0A1208-A0BitMnemonicBit NameResetStateFunctionIREQInterruptRequest0 This bit is set to indicate a pending interrupt.VT4:0 Vector Type 0 Contains the interrupt type of the highestpriority pending interrupt.NOTE:Reserved register bits are shown with gray shading. Reserved bits must be writtento a logic zero to ensure compatibility with future Intel products.Figure 8-11. Poll Register8-20