80C186EB/80C188EB Microprocessor User's Manual - CEUNES

SERIAL COMMUNICATIONS UNITThe serial port receives BREAK characters of two different lengths. If a BREAK character longerthan M bit-times is detected, the DBRK0 bit in SxSTS is set. If the BREAK character is longerthan 2M+3 bit-times, DBRK1 in SxSTS is set. M is equal to the total number of bits in a frame.For example, M is equal to 11 (decimal) in Mode 3.Register Name:Register Mnemonic:Register Function:Serial Status RegisterSxSTSIndicates the status of the serial port.15 0DBRK1DBRK0RB8/PERITIFETXEOECTSA1278-0ABitMnemonicBit NameResetStateFunctionDBRK1 Detect Break 1 0 Set when a break longer than 2M+3 bits occurs.DBRK0 Detect Break 0 0 Set when a break longer than M bits occurs.RB8/PERITIReceivedBit8/ParityErrorReceiveInterruptTransmitInterrupt0 Contains the 9th received data bit in modes 2and 3. PE is set when a parity error occurs. PEis valid only when parity is enabled in Mode 1,2 or 3.0 RI is set when a character has been receivedand placed in SxRBUF. Note that RI need notbe explicitly cleared to receive more characters.Writing a one to this bit will not cause aninterrupt.0 TI is set when a character has finished transmitting.TI determines when one morecharacter can be transmitted. Writing a one tothis bit will not cause an interrupt.NOTE:Reserved register bits are shown with gray shading. Reserved bits must be writtento a logic zero to ensure compatibility with future Intel products.Figure 10-14. Serial Port Status Register (SxSTS)10-16